Message-ID: <46F04D53.6040903@zytor.com>
Date: Tue, 18 Sep 2007 15:12:35 -0700
From: "H. Peter Anvin" <hpa@zytor.com>
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To: Jeremy Fitzhardinge <jeremy@goop.org>
CC: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca>,
       akpm@linux-foundation.org, linux-kernel@vger.kernel.org,
       Andi Kleen <ak@muc.de>, Chuck Ebbert <cebbert@redhat.com>,
       Christoph Hellwig <hch@infradead.org>
Subject: Re: [patch 4/7] Immediate Values - i386 Optimization
References: <20070918210747.828804366@polymtl.ca> <20070918210853.588573678@polymtl.ca> <46F04856.3010808@goop.org>
In-Reply-To: <46F04856.3010808@goop.org>
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Jeremy Fitzhardinge wrote:
> Mathieu Desnoyers wrote:
> 
>> +#define immediate_read(name)						\
>> +	({								\
>> +		__typeof__(name##__immediate) value;			\
>> +		switch (sizeof(value)) {				\
>> +		case 1:							\
>> +			asm (	".section __immediate, \"a\", @progbits;\n\t" \
>> +					".long %1, (0f)+1, 1;\n\t"	\
>> +					".previous;\n\t"		\
>> +					"0:\n\t"			\
>> +					"mov %2,%0;\n\t"		\
> 
> Given that you're relying on the exact instruction that this mov
> generates, it might be better to explicitly put the opcodes in with
> .byte.  That way you're protected from the assembler deciding to
> generate some other form of the instruction (for whatever reason).  I
> guess substituting in different registers would be a pain.

Allowing different registers should be doable, but if so, one would have
to put 0: at the *end* of the instruction and use (0f)-4 instead, since
the non-%eax forms are one byte longer.

This also seems "safer", since an imm32 is always the last thing in the
instruction.

	-hpa

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