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Mon, 20 Mar 2023 08:28:07 -0700 Date: Mon, 20 Mar 2023 08:28:05 -0700 From: Nicolin Chen To: Jason Gunthorpe CC: Robin Murphy , , , , , , , , , , Subject: Re: [PATCH v1 14/14] iommu/arm-smmu-v3: Add arm_smmu_cache_invalidate_user Message-ID: References: <1467e666-1b6c-c285-3f79-f8e8b088718b@arm.com> <92fdb06f-e5b1-8534-fb0e-ad47b5be9e1d@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT082:EE_|PH7PR12MB7794:EE_ X-MS-Office365-Filtering-Correlation-Id: fd61a141-e980-474b-2b7a-08db2957bc30 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: kdHorfnLGxZSHFcPnQzqtAvWCQsu+8zC2/q3x9ZKfJlLJtT35FgnDjO7X+TdOqIXJJ/gn3Pacpwyv/LmXpq9uBQle7mcxharPxul+5637f9hi0qtaKP4lUkpLgXSJDg+Bu3Vdro4SHin1fLjazrK4Z+NR4kGGR0oenQgkCS2ADrkamTXkmkN3YQ6UGXOs2/qSdEhDCRe4vwOg32QYhsgK+zEN1EQFr7PUYN3PajH21XSCM4OM62NQ05ybWjtjH6Hmt2PRIFBIiQkoZxUYYexecMuU68DIDDN5PiN0W8yBtT2LmVBltVkUaiGtRUTiaml2OAOB+2VgUT5BGWOMtDmkea7oSgvDIgKzfEmlQ7hbGR2U82ZY0nbLoILKjGrQm/13zo7nMXC3+6P21jlW4hHdk/1xnPDFoiEggD3fZuJ4HpV8Vaz4EkkWSnZhDQhgf4Vhf3+CrvjPGOQ5glbgR6boWYrM68BGbdG05xDX146Sfg/Wii1oT3UN9pssEAit+FkwkbrWF3DFouWm/Rr8Awrsxe6QtxKezbO5nOI8qDeEbEFvrQ69vbvZctOQaZFpQioH2UUkmFrPJq2R66XxcqZprO6PE/F5rbbwmY37E+oBfpEEo6eVZfj8yW+roS1f/766qXwUaUHnsdT0KDjUIabEXOcalpyjGqQaYwlWCstoNbBIfQbwloPHGCaTa+uvJdbn+uaw4SXNpdbsKTucok17VsnDblQ+FoMZsCCZMfCfFHcGz3LMrtdTGj1T72+HI8sFpCq6N11XQ5zIBcE5Oc06w== X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230025)(4636009)(346002)(376002)(136003)(396003)(39860400002)(451199018)(46966006)(36840700001)(40470700004)(316002)(82310400005)(83380400001)(6636002)(426003)(47076005)(336012)(86362001)(356005)(7636003)(55016003)(36860700001)(70206006)(40460700003)(82740400003)(40480700001)(8676002)(41300700001)(70586007)(2906002)(4744005)(8936002)(6862004)(4326008)(5660300002)(186003)(26005)(7416002)(54906003)(9686003)(478600001)(33716001)(341764005);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Mar 2023 15:28:19.7661 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: fd61a141-e980-474b-2b7a-08db2957bc30 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT082.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7794 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Mar 20, 2023 at 10:11:54AM -0300, Jason Gunthorpe wrote: > On Sun, Mar 19, 2023 at 06:32:03PM -0700, Nicolin Chen wrote: > > > +struct iommu_hwpt_invalidate_arm_smmuv3 { > > + struct iommu_iova_range range; > > what is this? Not used. A copy-n-paste mistake :( > > > + __u64 cmd[2]; > > +}; > > You still have to do something with the SID. We can't just allow any > un-validated SID value - the driver has to check the incoming SID > against allowed SIDs for this iommufd_ctx Hmm, that's something "missing" even in the current design. Yet, most of the TLBI commands don't hold an SID field. So, the hypervisor only trapping a queue write-pointer movement cannot get the exact vSID for a TLBI command. What our QEMU code currently does is simply broadcasting all the devices on the list of attaching devices to the vSMMU, which means that such an enforcement in the kernel would basically just allow any vSID (device) that's attached to the domain? Thanks Nic