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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id k126-20020acaba84000000b00386eff32f58sm2155846oif.13.2023.03.20.08.40.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Mar 2023 08:40:06 -0700 (PDT) Received: (nullmailer pid 1739413 invoked by uid 1000); Mon, 20 Mar 2023 15:40:05 -0000 Date: Mon, 20 Mar 2023 10:40:05 -0500 From: Rob Herring To: Julien Panis Cc: lee@kernel.org, krzysztof.kozlowski+dt@linaro.org, corbet@lwn.net, arnd@arndb.de, gregkh@linuxfoundation.org, derek.kiernan@xilinx.com, dragan.cvetic@xilinx.com, eric.auger@redhat.com, jgg@ziepe.ca, razor@blackwall.org, stephen@networkplumber.org, davem@davemloft.net, christian.koenig@amd.com, contact@emersion.fr, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, sterzik@ti.com, u-kumar1@ti.com, eblanc@baylibre.com, jneanne@baylibre.com Subject: Re: [PATCH v2 0/4] TI TPS6594 PMIC support (Core, ESM, PFSM) Message-ID: <20230320154005.GA1733616-robh@kernel.org> References: <20230315110736.35506-1-jpanis@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230315110736.35506-1-jpanis@baylibre.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Mar 15, 2023 at 12:07:32PM +0100, Julien Panis wrote: > TPS6594 is a Power Management IC which provides regulators and others > features like GPIOs, RTC, watchdog, ESMs (Error Signal Monitor), and > PFSM (Pre-configurable Finite State Machine). The SoC and the PMIC can > communicate through the I2C or SPI interfaces. > TPS6594 is the super-set device while TPS6593 and LP8764X are derivatives. > > This series adds support to TI TPS6594 PMIC and its derivatives. > > The features implemented in this series are: > - Core (MFD I2C and SPI entry points) > - ESM (child device) > - PFSM (child device) > > - Core description: > I2C and SPI interface protocols are implemented, with and without > the bit-integrity error detection feature (CRC mode). > In multi-PMIC configuration, all instances share a single GPIO of > the SoC to generate interrupt requests via their respective nINT > output pin. > > - ESM description: > This device monitors the SoC error output signal at its nERR_SOC > input pin. In error condition, ESM toggles its nRSTOUT_SOC pin > to reset the SoC. > Basically, ESM driver starts ESM hardware. > > - PFSM description: > Strictly speaking, PFSM is not hardware. It is a piece of code. > PMIC integrates a state machine which manages operational modes. > Depending on the current operational mode, some voltage domains > remain energized while others can be off. > PFSM driver can be used to trigger transitions between configured > states. > > Link to v1: > https://lore.kernel.org/all/20230216114410.183489-1-jpanis@baylibre.com/ > > Others series will be submitted over the next few weeks, providing > drivers for others child devices like GPIOs (pinctrl), RTC, and > regulators. Board support will also be added (device trees). I don't care about the drivers, but I need a complete binding for the device to review it. Rob