Date:   Mon, 20 Mar 2023 20:43:45 +0000
From:   Mark Brown <broonie@kernel.org>
To:     Marian Postevca <posteuca@mutex.one>
Cc:     Takashi Iwai <tiwai@suse.com>, Liam Girdwood <lgirdwood@gmail.com>,
        Jaroslav Kysela <perex@perex.cz>, linux-kernel@vger.kernel.org,
        alsa-devel@alsa-project.org
Subject: Re: [PATCH 1/4] ASoC: es8316: Enable support for S32 LE format and
 MCLK div by 2
Message-ID: <6825a54e-f2c0-41c4-981c-fafcd10454fd@sirena.org.uk>
References: <20230320203519.20137-1-posteuca@mutex.one>
 <20230320203519.20137-2-posteuca@mutex.one>
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        protocol="application/pgp-signature"; boundary="I8SYPlSVeAQJbM4T"
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On Mon, Mar 20, 2023 at 10:35:16PM +0200, Marian Postevca wrote:

> To properly support a line of Huawei laptops with AMD CPU and a
> ES8336 codec connected to the ACP3X module we need to enable
> the S32 LE format and the codec option to divide the MCLK by 2.

The 32 bit support and MCLK division are two separate changes so should
be two separate patches.

> -	lrck_divider = es8316->sysclk / params_rate(params);
> +
> +	mclk_div_option = device_property_read_bool(component->dev,
> +						    "everest,mclk-div-by-2");
> +	if (mclk_div_option) {

This introduces a DT property but there's no documentation for it, but I
don't see why we'd want this in the bindings - the driver should be able
to tell from the input clock rate and required output/internal clocks if
it needs to divide MCLK.

--I8SYPlSVeAQJbM4T
Content-Type: application/pgp-signature; name="signature.asc"

-----BEGIN PGP SIGNATURE-----

iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAmQYxYAACgkQJNaLcl1U
h9CX8gf/RmwyEoVVmr3aQ8Bp4SWGDyii+5RBC0xwiRgZWpgWzB4Dc2tmrAiPwu/S
DlPYvD699CAaluybZtEVr0GDyLE2ijsmd3IlNH41Zv7/EU5zh3pf/9nHwCz7c5XA
0IUONdpeqhsaGivX+mgCnKsDuNRM3Vglfw3RziTKVm8BmwKBYxMTgOQ2C4dB4wb1
YSHPdUE8x5gj7Ft5UMUPUqRNhFJX2+mA6VNtDR2P5YG2guKPrZGPIcNgtViqEfkU
ZA7U0mOvHZQNgqrM6C+XzBLH2nIXTI1IlCSAW5/XFFaD75yTwn+rmpuSe+EnjXRs
qd7ochD5wURL1ibYOSHqOrZnAqDhRg==
=+ZJZ
-----END PGP SIGNATURE-----

--I8SYPlSVeAQJbM4T--