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References: <20230210114957.2667963-1-danishanwar@ti.com>
In-Reply-To: <20230210114957.2667963-1-danishanwar@ti.com>
From:   Christian Gmeiner <christian.gmeiner@gmail.com>
Date:   Tue, 21 Mar 2023 09:51:21 +0100
Message-ID: <CAH9NwWdiWtGsbyQRWCPros7iuSZTm_9fzJFPtuyiMoDg3TubuA@mail.gmail.com>
Subject: Re: [PATCH v5 0/2] Introduce ICSSG based ethernet Driver
To:     MD Danish Anwar <danishanwar@ti.com>
Cc:     "Andrew F. Davis" <afd@ti.com>, Suman Anna <s-anna@ti.com>,
        Roger Quadros <rogerq@kernel.org>,
        YueHaibing <yuehaibing@huawei.com>,
        Vignesh Raghavendra <vigneshr@ti.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Rob Herring <robh+dt@kernel.org>,
        Paolo Abeni <pabeni@redhat.com>,
        Jakub Kicinski <kuba@kernel.org>,
        Eric Dumazet <edumazet@google.com>,
        "David S. Miller" <davem@davemloft.net>, andrew@lunn.ch, nm@ti.com,
        ssantosh@kernel.org, srk@ti.com, linux-kernel@vger.kernel.org,
        devicetree@vger.kernel.org, netdev@vger.kernel.org,
        linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org
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Hi

Am Fr., 10. Feb. 2023 um 13:02 Uhr schrieb MD Danish Anwar <danishanwar@ti.com>:
>
> The Programmable Real-time Unit and Industrial Communication Subsystem
> Gigabit (PRU_ICSSG) is a low-latency microcontroller subsystem in the TI
> SoCs. This subsystem is provided for the use cases like the implementation
> of custom peripheral interfaces, offloading of tasks from the other
> processor cores of the SoC, etc.
>
> The subsystem includes many accelerators for data processing like
> multiplier and multiplier-accumulator. It also has peripherals like
> UART, MII/RGMII, MDIO, etc. Every ICSSG core includes two 32-bit
> load/store RISC CPU cores called PRUs.
>
> The above features allow it to be used for implementing custom firmware
> based peripherals like ethernet.
>
> This series adds the YAML documentation and the driver with basic EMAC
> support for TI AM654 Silicon Rev 2 SoC with the PRU_ICSSG Sub-system.
> running dual-EMAC firmware.
> This currently supports basic EMAC with 1Gbps and 100Mbps link. 10M and
> half-duplex modes are not yet supported because they require the support
> of an IEP, which will be added later.
> Advanced features like switch-dev and timestamping will be added later.

What are TI plans to support TI AM642 Silicon Rev 2?

-- 
greets
--
Christian Gmeiner, MSc

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