Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A669AC6FD20 for ; Tue, 21 Mar 2023 20:31:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230273AbjCUUbo (ORCPT ); Tue, 21 Mar 2023 16:31:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46872 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229487AbjCUUbl (ORCPT ); Tue, 21 Mar 2023 16:31:41 -0400 Received: from mout-p-202.mailbox.org (mout-p-202.mailbox.org [80.241.56.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B9CB21E9F0 for ; Tue, 21 Mar 2023 13:31:37 -0700 (PDT) Received: from smtp202.mailbox.org (smtp202.mailbox.org [IPv6:2001:67c:2050:b231:465::202]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-p-202.mailbox.org (Postfix) with ESMTPS id 4Ph3D35wsCz9sJB; Tue, 21 Mar 2023 21:31:31 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oltmanns.dev; s=MBO0001; t=1679430691; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=EI5/y4CkeUNPmFzU1WxwnwF9KrIdum2QGMnmVmYyGcA=; b=ZWa4V3Z8E37AtZWzuoa765w3O+EbcbsjORlzxFQ303NssHQP/4F4nxS3Bf5Iy3GkO3FfQs mO4NdgckVtiK8J7lsQLun16oIBolSsFXsD/FvIe0DLOCnEdoLQXdSFGGc1WN2DPTJT8r2M UmRjE2Mgj16nMpWrErfWfy7Q2vU2iU1waTn2c5oERGNdlJ0fqVNvcZqbJTAbg0PQ5IZ4Dp zy9s4CuheqrjcxG+FBsWqfrrB936qfhFnoBykVNAOEcP9rTpTX5hVZAWn0qKjmEb/5BPaH dudgZKxdGnduwCjuGBnY6g6CfuzkeO7VwsU06XizmQQWNJ03jrHA5eyTg3fL6g== From: Frank Oltmanns To: Maxime Ripard Cc: jagan@amarulasolutions.com, michael@amarulasolutions.com, Chen-Yu Tsai , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , "open list:DRM DRIVERS FOR ALLWINNER A10" , "moderated list:ARM/Allwinner sunXi SoC support" , "open list:ARM/Allwinner sunXi SoC support" , open list , Roman Beranek Subject: Re: [PATCH 1/1] drm/sun4i: tcon: Fix setting PLL rate when using DSI Date: Tue, 21 Mar 2023 20:55:32 +0100 Message-ID: <87a605hmo5.fsf@oltmanns.dev> References: <20230319160704.9858-1-frank@oltmanns.dev> <20230319160704.9858-2-frank@oltmanns.dev> <20230321145739.jlpbzplsc27dlh7v@houat> In-reply-to: <20230321145739.jlpbzplsc27dlh7v@houat> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="=-=-=" X-Rspamd-Queue-Id: 4Ph3D35wsCz9sJB Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --=-=-= Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi Maxime, On 2023-03-21 at 15:57:39 +0100, Maxime Ripard wrote: > Hi, > > On Sun, Mar 19, 2023 at 05:07:04PM +0100, Frank Oltmanns wrote: >> Set the required PLL rate by adjusting the dotclock rate when calling >> clk_set_rate() when using DSI. >> >> According to the Allwinners A64=E2=80=99s BSP code, a TCON divider of 4 = has to >> be used and the PLL rate needs to be set to the following frequency when >> using DSI: >> PLL rate =3D DCLK * bpp / lanes >> >> After this change the common mode set function would only contain >> setting the resolution. Therefore, dissolve the function and transfer >> the functionality to the individual mode set functions. >> >> Signed-off-by: Frank Oltmanns > > This is similar to: > > > What=E2=80=99s the story there? Sorry, as Roman wrote in the other thread, I submitted the patch after not = hearing back from him for a week. My apologies, I wasn=E2=80=99t patient en= ough. So now there are two submissions to consider. FWIW, I think this patc= h is a bit more straightforward than the other one. Best regards, Frank > Maxime > --=-=-=--