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Date:   Thu, 23 Mar 2023 10:55:32 +0100
From:   Thierry Reding <thierry.reding@gmail.com>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc:     Sumit Gupta <sumitg@nvidia.com>, treding@nvidia.com,
        dmitry.osipenko@collabora.com, viresh.kumar@linaro.org,
        rafael@kernel.org, jonathanh@nvidia.com, robh+dt@kernel.org,
        lpieralisi@kernel.org, linux-kernel@vger.kernel.org,
        linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org,
        devicetree@vger.kernel.org, linux-pci@vger.kernel.org,
        mmaddireddy@nvidia.com, kw@linux.com, bhelgaas@google.com,
        vidyas@nvidia.com, sanjayc@nvidia.com, ksitaraman@nvidia.com,
        ishah@nvidia.com, bbasu@nvidia.com
Subject: Re: [Patch v3 10/11] memory: tegra: handle no BWMGR MRQ support in
 BPMP
Message-ID: <ZBwiFEJ1bTMy6yTf@orome>
References: <20230320182441.11904-1-sumitg@nvidia.com>
 <20230320182441.11904-11-sumitg@nvidia.com>
 <dd6257a9-1a12-23f9-e770-0809aaa7ed0e@linaro.org>
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On Wed, Mar 22, 2023 at 06:50:23PM +0100, Krzysztof Kozlowski wrote:
> On 20/03/2023 19:24, Sumit Gupta wrote:
> > If BPMP-FW doesn't support 'MRQ_BWMGR_INT', then the MC Client driver
> > probe fails with 'EPROBE_DEFER' which it receives on calling the func
> > 'devm_of_icc_get()'. Fix this by initializing the ICC even if the MRQ
> > is missing and return 'EINVAL' from 'icc_set_bw()' instead of passing
> > the request to BPMP-FW later when the BW request is made by client.
> >=20
> > Fixes: ("memory: tegra: add interconnect support for DRAM scaling in Te=
gra234")
>=20
> That's not correct tag.
>=20
> Anyway, send fixes separately.

I think this was a bit confusing. This fixes an issue that was
introduced in a patch earlier in this series, so it's probably better to
squash it into that patch rather than have a separate fix patch in the
same series.

Thierry

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Content-Type: application/pgp-signature; name="signature.asc"

-----BEGIN PGP SIGNATURE-----

iQIzBAABCAAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmQcIhQACgkQ3SOs138+
s6GPPA//bkgG/9emg8XAzAiCCk14SYzw8PzesQOWogN/oL/DK9MK6TrmtLLHpZvm
I8A3FSzAy0bHgtNmlvogMEog/QqVODAumS7zIUxFfuQxfU/ZFYBiphVULHvcyWNu
/7/84LwUTURyUKPbZGlVzV+bMst1ShUnVjX/YLIMo2gt8knj/C3X12AZETLtW+i+
raTIkwrync5K8TqbYSfQrtlRTQH7VwS2eKBt1U5zZOO9kKlhsQPexVZ2ovxrtoZG
98nrddvhggkn6EGE8FNXxdzt2a5HgMqpbA8sGt+WfpevT6abCHOA7b2JMYYyvt5S
8uSKGq7LFx2JA95RTwa7GaWeLiqvWPeoFeeEgFbBe8nLBxOowwYXjJA9ocjVlThI
eIGDk47LHlesyXS2cyYsnEAa8/JuXNx6RV1QT6l139rtwIQlnq1q5xcHW5B9Xa6F
Pn+5H6Ztr5/xU8OHlNdKUMTC0k5CpuvlapIkQ+ztdPZ0AArhjVSFXaL+rKAZsnj3
S2CSN7r4guMWGUJ+eyoCzPujlMnF6+ZbAMNHGUYBDNYWX4Cy39r/3EUIfZP5kD8G
/kQWWTbgf8LZD2V65bk+rcz7oCNbisO0Xv2WjYm7H6+sUK/dmEcM/qEAfqukElDP
/s4n+oICxCOEu3Q4Ei38PDvUk9ayMpzFV5dlKutGDCJc8MH8G7o=
=+/zC
-----END PGP SIGNATURE-----

--jHN3+CG4rKdPqrN7--