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From:   Krishna Yarlagadda <kyarlagadda@nvidia.com>
To:     Hillf Danton <hdanton@sina.com>
CC:     "robh+dt@kernel.org" <robh+dt@kernel.org>,
        "broonie@kernel.org" <broonie@kernel.org>,
        "peterhuewe@gmx.de" <peterhuewe@gmx.de>,
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        "krzysztof.kozlowski+dt@linaro.org" 
        <krzysztof.kozlowski+dt@linaro.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [Patch V8 2/3] tpm_tis-spi: Add hardware wait polling
Thread-Topic: [Patch V8 2/3] tpm_tis-spi: Add hardware wait polling
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Date:   Thu, 23 Mar 2023 11:57:55 +0000
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References: <20230302041804.24718-1-kyarlagadda@nvidia.com>
 <20230319142737.2191-1-hdanton@sina.com>
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> -----Original Message-----
> From: Hillf Danton <hdanton@sina.com>
> Sent: 19 March 2023 19:58
> To: Krishna Yarlagadda <kyarlagadda@nvidia.com>
> Cc: robh+dt@kernel.org; broonie@kernel.org; peterhuewe@gmx.de;
> jgg@ziepe.ca; jarkko@kernel.org; krzysztof.kozlowski+dt@linaro.org; linux=
-
> kernel@vger.kernel.org
> Subject: Re: [Patch V8 2/3] tpm_tis-spi: Add hardware wait polling
>=20
> External email: Use caution opening links or attachments
>=20
>=20
> On 2 Mar 2023 09:48:03 +0530 Krishna Yarlagadda <kyarlagadda@nvidia.com>
> > +static int tpm_tis_spi_hw_flow_transfer(struct tpm_tis_data *data,
> > +                                     u32 addr, u16 len, u8 *in,
> > +                                     const u8 *out)
> > +{
> > +     struct tpm_tis_spi_phy *phy =3D to_tpm_tis_spi_phy(data);
> > +     struct spi_transfer spi_xfer[3];
> > +     struct spi_message m;
> > +     u8 transfer_len;
> > +     int ret;
> > +
> > +     while (len) {
> > +             transfer_len =3D min_t(u16, len, MAX_SPI_FRAMESIZE);
> > +
> > +             spi_message_init(&m);
> > +             phy->iobuf[0] =3D (in ? 0x80 : 0) | (transfer_len - 1);
> > +             phy->iobuf[1] =3D 0xd4;
> > +             phy->iobuf[2] =3D addr >> 8;
> > +             phy->iobuf[3] =3D addr;
> > +
> > +             memset(&spi_xfer, 0, sizeof(spi_xfer));
> > +
> > +             spi_xfer[0].tx_buf =3D phy->iobuf;
> > +             spi_xfer[0].len =3D 1;
> > +             spi_message_add_tail(&spi_xfer[0], &m);
> > +
> > +             spi_xfer[1].tx_buf =3D phy->iobuf + 1;
> > +             spi_xfer[1].len =3D 3;
> > +             spi_message_add_tail(&spi_xfer[1], &m);
> > +
> > +             if (out) {
> > +                     spi_xfer[2].tx_buf =3D &phy->iobuf[4];
> > +                     spi_xfer[2].rx_buf =3D NULL;
> > +                     memcpy(&phy->iobuf[4], out, transfer_len);
> > +                     out +=3D transfer_len;
> > +             }
> > +
> > +             if (in) {
> > +                     spi_xfer[2].tx_buf =3D NULL;
> > +                     spi_xfer[2].rx_buf =3D &phy->iobuf[4];
> > +             }
> > +
> > +             spi_xfer[2].len =3D transfer_len;
> > +             spi_message_add_tail(&spi_xfer[2], &m);
> > +
> > +             reinit_completion(&phy->ready);
>=20
> What breaks without reinit? Or what sense made by init-ing it again?
When length is over frame size, this loop will run for more than
one iterations. Reinit to start transfer again.
KY
> > +
> > +             ret =3D spi_sync_locked(phy->spi_device, &m);
> > +             if (ret < 0)
> > +                     return ret;
> > +
> > +             if (in) {
> > +                     memcpy(in, &phy->iobuf[4], transfer_len);
> > +                     in +=3D transfer_len;
> > +             }
> > +
> > +             len -=3D transfer_len;
> > +     }
> > +
> > +     return ret;
> > +}