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From:   Jianmin Lv <lvjianmin@loongson.cn>
To:     Thomas Gleixner <tglx@linutronix.de>, Marc Zyngier <maz@kernel.org>
Cc:     linux-kernel@vger.kernel.org, loongarch@lists.linux.dev,
        Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
        Jiaxun Yang <jiaxun.yang@flygoat.com>,
        Huacai Chen <chenhuacai@loongson.cn>,
        loongson-kernel@lists.loongnix.cn
Subject: [PATCH V1 5/5] irqchip/loongson-pch-pic: Fix registration of syscore_ops
Date:   Fri, 24 Mar 2023 14:08:54 +0800
Message-Id: <20230324060854.29375-6-lvjianmin@loongson.cn>
In-Reply-To: <20230324060854.29375-1-lvjianmin@loongson.cn>
References: <20230324060854.29375-1-lvjianmin@loongson.cn>
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When support suspend/resume for loongson-pch-pic, the syscore_ops is
registered twice in dual-bridges machines where there are two pch-pic IRQ
domains. Repeated registration of an same syscore_ops broke syscore_ops_list,
so the patch will corret it.

Change-Id: Ib08e102931f1b90082d8eaa752287f60147bf777
Fixes: 1ed008a2c331 ("irqchip/loongson-pch-pic: Add suspend/resume support")
Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn>
---
 drivers/irqchip/irq-loongson-pch-pic.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/irqchip/irq-loongson-pch-pic.c b/drivers/irqchip/irq-loongson-pch-pic.c
index e3c698ca11e9..e5fe4d50be05 100644
--- a/drivers/irqchip/irq-loongson-pch-pic.c
+++ b/drivers/irqchip/irq-loongson-pch-pic.c
@@ -311,7 +311,8 @@ static int pch_pic_init(phys_addr_t addr, unsigned long size, int vec_base,
 	pch_pic_handle[nr_pics] = domain_handle;
 	pch_pic_priv[nr_pics++] = priv;
 
-	register_syscore_ops(&pch_pic_syscore_ops);
+	if (nr_pics == 1)
+		register_syscore_ops(&pch_pic_syscore_ops);
 
 	return 0;
 
-- 
2.31.1