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From:   Jun Li <jun.li@nxp.com>
To:     Marco Felsch <m.felsch@pengutronix.de>,
        "robh+dt@kernel.org" <robh+dt@kernel.org>,
        "krzysztof.kozlowski+dt@linaro.org" 
        <krzysztof.kozlowski+dt@linaro.org>,
        "shawnguo@kernel.org" <shawnguo@kernel.org>,
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        "festevam@gmail.com" <festevam@gmail.com>
CC:     "linux-arm-kernel@lists.infradead.org" 
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        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "kernel@pengutronix.de" <kernel@pengutronix.de>,
        Xu Yang <xu.yang_2@nxp.com>
Subject: RE: [PATCH] arm64: dts: imx8mp-evk: add dual-role usb port1 support
Thread-Topic: [PATCH] arm64: dts: imx8mp-evk: add dual-role usb port1 support
Thread-Index: AQHZXXZt5pMZSwGyAE6437fZs85FYq8JtdDg
Date:   Fri, 24 Mar 2023 10:18:17 +0000
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References: <20230323105826.2058003-1-m.felsch@pengutronix.de>
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> -----Original Message-----
> From: Marco Felsch <m.felsch@pengutronix.de>
> Sent: Thursday, March 23, 2023 6:58 PM
> To: robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org;
> shawnguo@kernel.org; dl-linux-imx <linux-imx@nxp.com>; festevam@gmail.com
> Cc: linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org;
> kernel@pengutronix.de
> Subject: [PATCH] arm64: dts: imx8mp-evk: add dual-role usb port1 support
>=20
> The i.MX8MP-EVK has a dual-role usb-type-c port marked as PORT1. By this
> commit the dual-role support is added which allows the user-space to assi=
gn
> usb-gadget functions to it via the configFS.

So just ignore the orientation switch will make this port cannot work
at super speed, this is actually why this port is not enabled at upstream.
I see the orientation switch via GPIO for SBU is already merged:
drivers/usb/typec/mux/gpio-sbu-mux.c
Do you have interest to expand this driver to support super speed
switch for this case?=20

Thanks
Li Jun
>=20
> Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
> ---
>  arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 59 ++++++++++++++++++++
>  1 file changed, 59 insertions(+)
>=20
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> index f2d93437084be..982fe35f09a7e 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> @@ -5,7 +5,9 @@
>=20
>  /dts-v1/;
>=20
> +#include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/phy/phy-imx8-pcie.h>
> +#include <dt-bindings/usb/pd.h>
>  #include "imx8mp.dtsi"
>=20
>  / {
> @@ -336,6 +338,34 @@ &i2c2 {
>  	pinctrl-names =3D "default";
>  	pinctrl-0 =3D <&pinctrl_i2c2>;
>  	status =3D "okay";
> +
> +	tcpc@50 {
> +		compatible =3D "nxp,ptn5110";
> +		reg =3D <0x50>;
> +		pinctrl-names =3D "default";
> +		pinctrl-0 =3D <&pinctrl_tcpc>;
> +		interrupt-parent =3D <&gpio4>;
> +		interrupts =3D <19 IRQ_TYPE_LEVEL_LOW>;
> +
> +		connector {
> +			compatible =3D "usb-c-connector";
> +			label =3D "USB-C";
> +			power-role =3D "dual";
> +			data-role =3D "dual";
> +			try-power-role =3D "sink";
> +			source-pdos =3D <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
> +			sink-pdos =3D <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
> +				     PDO_VAR(5000, 20000, 3000)>;
> +			op-sink-microwatt =3D <15000000>;
> +			self-powered;
> +		};
> +
> +		port {
> +			usb_con_ss: endpoint {
> +				remote-endpoint =3D <&usb_dwc3_0_drd>;
> +			};
> +		};
> +	};
>  };
>=20
>  &i2c3 {
> @@ -449,14 +479,37 @@ &uart2 {
>  	status =3D "okay";
>  };
>=20
> +&usb3_phy0 {
> +	status =3D "okay";
> +};
> +
>  &usb3_phy1 {
>  	status =3D "okay";
>  };
>=20
> +&usb3_0 {
> +	status =3D "okay";
> +};
> +
>  &usb3_1 {
>  	status =3D "okay";
>  };
>=20
> +&usb_dwc3_0 {
> +	dr_mode =3D "otg";
> +	hnp-disable;
> +	srp-disable;
> +	adp-disable;
> +	usb-role-switch;
> +	status =3D "okay";
> +
> +	port {
> +		usb_dwc3_0_drd: endpoint {
> +			remote-endpoint =3D <&usb_con_ss>;
> +		};
> +	};
> +};
> +
>  &usb_dwc3_1 {
>  	pinctrl-names =3D "default";
>  	pinctrl-0 =3D <&pinctrl_usb1_vbus>;
> @@ -666,6 +719,12 @@ MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19	0x40
>  		>;
>  	};
>=20
> +	pinctrl_tcpc: tcpcgrp {
> +		fsl,pins =3D <
> +			MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19	0x159
> +		>;
> +	};
> +
>  	pinctrl_uart1: uart1grp {
>  		fsl,pins =3D <
>  			MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX	0x140
> --
> 2.30.2