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[2620:137:e000::1:20]) by mx.google.com with ESMTP id c17-20020a170902d49100b0019af153b740si22061340plg.625.2023.03.24.06.35.00; Fri, 24 Mar 2023 06:35:13 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@canonical.com header.s=20210705 header.b=b34nfFRc; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=canonical.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231839AbjCXNeJ (ORCPT + 99 others); Fri, 24 Mar 2023 09:34:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35742 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231761AbjCXNeH (ORCPT ); Fri, 24 Mar 2023 09:34:07 -0400 Received: from smtp-relay-internal-1.canonical.com (smtp-relay-internal-1.canonical.com [185.125.188.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1637219C59 for ; Fri, 24 Mar 2023 06:33:58 -0700 (PDT) Received: from mail-qt1-f199.google.com (mail-qt1-f199.google.com [209.85.160.199]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id 6DEC54188A for ; Fri, 24 Mar 2023 13:33:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1679664835; bh=baRLhktlWOxcXvwHFNv0QgrA5IgUVwTfkSsdMkEu4+4=; h=MIME-Version:References:In-Reply-To:From:Date:Message-ID:Subject: To:Cc:Content-Type; b=b34nfFRc1TfAcYkAdvQbNUvYd2zY0XJmbIxm4YuEEqwbARIb3CoHSAAKNtgykJZDg Sa3aBSNsXcgs36j1XG5VwnqCqmlvblPCKgNanTRh2QclfcW6rq7/MKz+5kUDI9rTq3 1YPXCASO/60wnY45RTVq3LFngmVKm3P1btuNk69+1sgkUOoWna6yXMF2w0+xvfOT3a xGaAhqDf99yYwYAB1nBrTlpqs6+YWYx5nfpZMq3QUWlBzooWVwhZCAag0xz9NJpDWj tiTc/F4JUEyWNnywsRt3MMmI4m3VNlCYxusYyVUMjePX81+VrxnlVapQRywAnF0bPK CydrXFrzReHFA== Received: by mail-qt1-f199.google.com with SMTP id p19-20020ac87413000000b003d2753047cbso1021552qtq.19 for ; Fri, 24 Mar 2023 06:33:55 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679664834; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=baRLhktlWOxcXvwHFNv0QgrA5IgUVwTfkSsdMkEu4+4=; b=A9CWeFczfDBIM0d4iFLSsvoelSxx8+YCBED7wmz5Vsf3xU892FnbTS5954cq92ou7v 6QsKMepsfxXY0S6os3BdzxpjAt546dOvh/xsn2joXrEI+5mj+2qYQhF68FhoM1bjvSAR 8kC4dV1kGkJqC1BYGoWfAWRoXvgMTHm5lVM21t+XsBblJKRGbgwbfDkRiHd0vlE8z4gi aQBR3hhLRPdrFl4H0PO1OI8wGpXvQyxLq1qKutS7sgN07+DA27+iirdrDFfQwU0eDjJK +0f0e5eyh/dTvat+BcQ00Mg5syZQ69awAgo2b8j7J+1vDZ4wKIBhvDFW/mmOiEvL09M4 vlBw== X-Gm-Message-State: AO0yUKWOc+ZQgHAe9/QzN89+pj/uCln4z+Wygo0RUUmspezSME+UhhJy VANFjwUmTnCWvIBMEejzS4g8a/TEq5RtfUHGuLXWTut/GhG4+8bwVPoQbJLc4MZa1HrEMhGIsYW 6LELI8jxVzc70sVLbFuoKe2br7BZOPjYrpMVoYEIXWgWO684ItV07kCtgrw== X-Received: by 2002:a05:620a:a18:b0:746:7f12:f2f3 with SMTP id i24-20020a05620a0a1800b007467f12f2f3mr651797qka.13.1679664834420; Fri, 24 Mar 2023 06:33:54 -0700 (PDT) X-Received: by 2002:a05:620a:a18:b0:746:7f12:f2f3 with SMTP id i24-20020a05620a0a1800b007467f12f2f3mr651787qka.13.1679664834154; Fri, 24 Mar 2023 06:33:54 -0700 (PDT) MIME-Version: 1.0 References: <20230322094820.24738-1-walker.chen@starfivetech.com> <20230322094820.24738-3-walker.chen@starfivetech.com> In-Reply-To: <20230322094820.24738-3-walker.chen@starfivetech.com> From: Emil Renner Berthing Date: Fri, 24 Mar 2023 14:33:38 +0100 Message-ID: Subject: Re: [PATCH v6 2/4] dmaengine: dw-axi-dmac: Add support for StarFive JH7110 DMA To: Walker Chen Cc: Eugeniy Paltsev , Vinod Koul , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Palmer Dabbelt , dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-2.5 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 22 Mar 2023 at 10:48, Walker Chen wrote: > > Add DMA reset operation in device probe and use different configuration > on CH_CFG registers according to match data. Update all uses of > of_device_is_compatible with of_device_get_match_data. > > Signed-off-by: Walker Chen Thanks! Reviewed-by: Emil Renner Berthing > --- > .../dma/dw-axi-dmac/dw-axi-dmac-platform.c | 38 ++++++++++++++++--- > drivers/dma/dw-axi-dmac/dw-axi-dmac.h | 1 + > 2 files changed, 34 insertions(+), 5 deletions(-) > > diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c > index 4169e1d7d5ca..6cfcb541d8c3 100644 > --- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c > +++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c > @@ -21,10 +21,12 @@ > #include > #include > #include > +#include > #include > #include > #include > #include > +#include > #include > #include > > @@ -46,6 +48,10 @@ > DMA_SLAVE_BUSWIDTH_32_BYTES | \ > DMA_SLAVE_BUSWIDTH_64_BYTES) > > +#define AXI_DMA_FLAG_HAS_APB_REGS BIT(0) > +#define AXI_DMA_FLAG_HAS_RESETS BIT(1) > +#define AXI_DMA_FLAG_USE_CFG2 BIT(2) > + > static inline void > axi_dma_iowrite32(struct axi_dma_chip *chip, u32 reg, u32 val) > { > @@ -86,7 +92,8 @@ static inline void axi_chan_config_write(struct axi_dma_chan *chan, > > cfg_lo = (config->dst_multblk_type << CH_CFG_L_DST_MULTBLK_TYPE_POS | > config->src_multblk_type << CH_CFG_L_SRC_MULTBLK_TYPE_POS); > - if (chan->chip->dw->hdata->reg_map_8_channels) { > + if (chan->chip->dw->hdata->reg_map_8_channels && > + !chan->chip->dw->hdata->use_cfg2) { > cfg_hi = config->tt_fc << CH_CFG_H_TT_FC_POS | > config->hs_sel_src << CH_CFG_H_HS_SEL_SRC_POS | > config->hs_sel_dst << CH_CFG_H_HS_SEL_DST_POS | > @@ -1367,10 +1374,11 @@ static int parse_device_properties(struct axi_dma_chip *chip) > > static int dw_probe(struct platform_device *pdev) > { > - struct device_node *node = pdev->dev.of_node; > struct axi_dma_chip *chip; > struct dw_axi_dma *dw; > struct dw_axi_dma_hcfg *hdata; > + struct reset_control *resets; > + unsigned int flags; > u32 i; > int ret; > > @@ -1398,12 +1406,25 @@ static int dw_probe(struct platform_device *pdev) > if (IS_ERR(chip->regs)) > return PTR_ERR(chip->regs); > > - if (of_device_is_compatible(node, "intel,kmb-axi-dma")) { > + flags = (uintptr_t)of_device_get_match_data(&pdev->dev); > + if (flags & AXI_DMA_FLAG_HAS_APB_REGS) { > chip->apb_regs = devm_platform_ioremap_resource(pdev, 1); > if (IS_ERR(chip->apb_regs)) > return PTR_ERR(chip->apb_regs); > } > > + if (flags & AXI_DMA_FLAG_HAS_RESETS) { > + resets = devm_reset_control_array_get_exclusive(&pdev->dev); > + if (IS_ERR(resets)) > + return PTR_ERR(resets); > + > + ret = reset_control_deassert(resets); > + if (ret) > + return ret; > + } > + > + chip->dw->hdata->use_cfg2 = !!(flags & AXI_DMA_FLAG_USE_CFG2); > + > chip->core_clk = devm_clk_get(chip->dev, "core-clk"); > if (IS_ERR(chip->core_clk)) > return PTR_ERR(chip->core_clk); > @@ -1554,8 +1575,15 @@ static const struct dev_pm_ops dw_axi_dma_pm_ops = { > }; > > static const struct of_device_id dw_dma_of_id_table[] = { > - { .compatible = "snps,axi-dma-1.01a" }, > - { .compatible = "intel,kmb-axi-dma" }, > + { > + .compatible = "snps,axi-dma-1.01a" > + }, { > + .compatible = "intel,kmb-axi-dma", > + .data = (void *)AXI_DMA_FLAG_HAS_APB_REGS, > + }, { > + .compatible = "starfive,jh7110-axi-dma", > + .data = (void *)(AXI_DMA_FLAG_HAS_RESETS | AXI_DMA_FLAG_USE_CFG2), > + }, > {} > }; > MODULE_DEVICE_TABLE(of, dw_dma_of_id_table); > diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h > index e9d5eb0fd594..eb267cb24f67 100644 > --- a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h > +++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h > @@ -33,6 +33,7 @@ struct dw_axi_dma_hcfg { > /* Register map for DMAX_NUM_CHANNELS <= 8 */ > bool reg_map_8_channels; > bool restrict_axi_burst_len; > + bool use_cfg2; > }; > > struct axi_dma_chan { > -- > 2.17.1 >