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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Thomas Petazzoni , Herve Codina , =?utf-8?Q?Miqu=C3=A8l?= Raynal , Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Arun Ramadoss , linux-renesas-soc@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Alexis =?utf-8?Q?Lothor=C3=A9?= Subject: Re: [PATCH RESEND net-next v4 2/3] net: dsa: rzn1-a5psw: add support for .port_bridge_flags Message-ID: <20230324221030.eps7xsbapwfzjxez@skbuf> References: <20230314163651.242259-1-clement.leger@bootlin.com> <20230314163651.242259-3-clement.leger@bootlin.com> <20230314230821.kjiyseiqhat4apqb@skbuf> <20230316125329.75b290d4@fixe.home> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20230316125329.75b290d4@fixe.home> X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Mar 16, 2023 at 12:53:29PM +0100, Cl?ment L?ger wrote: > Le Wed, 15 Mar 2023 01:08:21 +0200, > Vladimir Oltean a ?crit : > > > On Tue, Mar 14, 2023 at 05:36:50PM +0100, Cl?ment L?ger wrote: > > > +static int a5psw_port_pre_bridge_flags(struct dsa_switch *ds, int port, > > > + struct switchdev_brport_flags flags, > > > + struct netlink_ext_ack *extack) > > > +{ > > > + if (flags.mask & ~(BR_LEARNING | BR_FLOOD | BR_MCAST_FLOOD | > > > + BR_BCAST_FLOOD)) > > > + return -EINVAL; > > > + > > > + return 0; > > > +} > > > + > > > +static int > > > +a5psw_port_bridge_flags(struct dsa_switch *ds, int port, > > > + struct switchdev_brport_flags flags, > > > + struct netlink_ext_ack *extack) > > > +{ > > > + struct a5psw *a5psw = ds->priv; > > > + u32 val; > > > + > > > + if (flags.mask & BR_LEARNING) { > > > + val = flags.val & BR_LEARNING ? 0 : A5PSW_INPUT_LEARN_DIS(port); > > > + a5psw_reg_rmw(a5psw, A5PSW_INPUT_LEARN, > > > + A5PSW_INPUT_LEARN_DIS(port), val); > > > + } > > > > 2 issues. > > > > 1: does this not get overwritten by a5psw_port_stp_state_set()? > > Hum indeed. How is this kind of thing supposed to be handled ? Should I > remove the handling of BR_LEARNING to forbid modifying it ? Ot should I > allow it only if STP isn't enabled (which I'm not sure how to do it) ? It's handled correctly by only enabling learning in port_stp_state_set() if dp->learning allows it. See sja1105_bridge_stp_state_set(): case BR_STATE_LEARNING: mac[port].dyn_learn = dp->learning; break; case BR_STATE_FORWARDING: mac[port].dyn_learn = dp->learning; ocelot_bridge_stp_state_set(): if ((state == BR_STATE_LEARNING || state == BR_STATE_FORWARDING) && ocelot_port->learn_ena) learn_ena = ANA_PORT_PORT_CFG_LEARN_ENA; ksz_port_stp_state_set(): case BR_STATE_LEARNING: if (!p->learning) data |= PORT_LEARN_DISABLE; break; case BR_STATE_FORWARDING: if (!p->learning) data |= PORT_LEARN_DISABLE; > > enables flooding on the port after calling a5psw_port_bridge_leave(). > > So the port which has left a bridge is standalone, but it still forwards > > packets to the other bridged ports! > > Actually not this way because the port is configured in a specific mode > which only forward packet to the CPU ports. Indeed, we set a specific > rule using the PATTERN_CTRL register with the MGMTFWD bit set: > When set, the frame is forwarded to the management port only > (suppressing destination address lookup). Ah, cool, this answers one of my issues in the other thread. > However, the port will received packets *from* the other ports (which is > wrong... I can handle that by not setting the flooding attributes if > the port is not in bridge. Doing so would definitely fix the various > problems that could happen. hmm.. I guess that could work?