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From:   Swapnil Kashinath Jakhade <sjakhade@cadence.com>
To:     Roger Quadros <rogerq@kernel.org>,
        "vkoul@kernel.org" <vkoul@kernel.org>,
        "kishon@kernel.org" <kishon@kernel.org>,
        "linux-phy@lists.infradead.org" <linux-phy@lists.infradead.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
CC:     Milind Parab <mparab@cadence.com>
Subject: RE: [PATCH] phy: cadence: Sierra: Add PCIe + SGMII PHY multilink
 configuration
Thread-Topic: [PATCH] phy: cadence: Sierra: Add PCIe + SGMII PHY multilink
 configuration
Thread-Index: AQHZRTVZZt7PSGILJ0qEJdebsUpxC67YBBOAgDZMgeA=
Date:   Mon, 27 Mar 2023 05:34:08 +0000
Message-ID: <DM6PR07MB615438BAA6DA35E5FFE4737FC58B9@DM6PR07MB6154.namprd07.prod.outlook.com>
References: <20230220141216.25326-1-sjakhade@cadence.com>
 <c7bdaf8f-d377-9fdc-c11a-747c65775b3c@kernel.org>
In-Reply-To: <c7bdaf8f-d377-9fdc-c11a-747c65775b3c@kernel.org>
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