Received: by 2002:a05:6358:11c7:b0:104:8066:f915 with SMTP id i7csp2620303rwl; Mon, 27 Mar 2023 02:55:09 -0700 (PDT) X-Google-Smtp-Source: AKy350ZkOulke4mfCt5o9iSADuwFtDcfzeoXA7qswfgW0lCTzB9c4ExTKOE++D3hv40Q4wob6tSG X-Received: by 2002:a17:90b:4b8f:b0:237:30ef:e593 with SMTP id lr15-20020a17090b4b8f00b0023730efe593mr12491486pjb.24.1679910909527; Mon, 27 Mar 2023 02:55:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1679910909; cv=none; d=google.com; s=arc-20160816; b=SJaJ0j6cjpnErnO3tNM9Mhkrt15uPzK6ahIY9d9jkBlRc43eGHzUgFHVczgRt6Z5h5 VjDVk+lOn0uzWkDLkbxydmgzlChyqrrsWO7Xl/cmBPl2Le8NSX8ivPh0vokqdvVSMcKr RduASy+uc9Kp1YMqw63p3ARkdKEqJap9mxmyusL5vKH+jilTsvPuYW5Et8e1UfJpcoDf EbheibN2sWH3NKBe9eCcP39z39YGSjJWkai7X4CtbFSVkhl0wjthrc7E9/e6pMzTGUm/ eX2rizjQQi7FKxH36WcfjDoGMzOaq4C3Ixkf9UuSV4+2uPPJZJfixIk/DhkJWjrO+4Zp DDIQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=IgxbP3Lk4AHGFPfWx4tTHgBCRSIJL4ZW3qJEzfA4iqE=; b=Ky3JBy7yta0UaMkj4o50zoKm19OavF/IXDa1R17JkFXBcBJdgaAb7g0do9yNcB5t2s zYDSLS9h5XacE1NEiKTR04OzX+E+bN7fcO7+nmVOkaF9bV4UNe+VOc+7lij2YXPmO6o3 isPiyEoVa5HDubCK7ttsrqnBefmJNkiAoRpdLUIahBer/+Y8sZu+ai5FdR41R3bfobDs 5zyDRldLxXSh2Tu4WtYamzC5FTl5fuFfQvkM86mK/KbxEudRzZQTDX1jKjHDM7HuEmY6 Ihrq2GxGoPnvynC8CT3HLDFM74kuxAnaYZpG+FbzqrJhQIkEPAYMXSPWOywgrnCCHa5x +k3g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=ktdnRlxP; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id z5-20020a17090ad78500b00240889d7357si1429638pju.103.2023.03.27.02.54.57; Mon, 27 Mar 2023 02:55:09 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=ktdnRlxP; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232888AbjC0Jyb (ORCPT + 99 others); Mon, 27 Mar 2023 05:54:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50978 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232424AbjC0Jy3 (ORCPT ); Mon, 27 Mar 2023 05:54:29 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 718CC5252; Mon, 27 Mar 2023 02:54:26 -0700 (PDT) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 32R8TSv9115965; Mon, 27 Mar 2023 03:29:28 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1679905768; bh=IgxbP3Lk4AHGFPfWx4tTHgBCRSIJL4ZW3qJEzfA4iqE=; h=From:To:CC:Subject:Date; b=ktdnRlxPxWtaA+rNt5jw3TvFuLg6CWYbDxXIl0AdmVUU6q6DsX6LYyNYnWnKSqr8W uOnthNvI91mqhWVIIX97kGT0aKsVENRc/AvOt/9ZTELtmRR/XywYlzau036NdmXgaK mlUcdM7lYUFyX3SdJJIhF6R0uI4sFLZRBuk6qryw= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 32R8TSXc015585 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 27 Mar 2023 03:29:28 -0500 Received: from DFLE103.ent.ti.com (10.64.6.24) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Mon, 27 Mar 2023 03:29:28 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Mon, 27 Mar 2023 03:29:28 -0500 Received: from LT5CD112GSQZ.dhcp.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 32R8TPvs043578; Mon, 27 Mar 2023 03:29:25 -0500 From: Apurva Nandan To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , , , CC: Apurva Nandan Subject: [PATCH] arm64: dts: ti: k3-j784s4-evm: Add OSPI0 flash support Date: Mon, 27 Mar 2023 13:59:24 +0530 Message-ID: <20230327082924.12427-1-a-nandan@ti.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-2.5 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_PASS, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support for OSPI flash connected to OSPI0 instance through FSS. Also enumerate OSPI1 instance in MCU DTSI. Signed-off-by: Apurva Nandan --- arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 44 +++++++++++++++++++ .../boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 43 ++++++++++++++++++ 2 files changed, 87 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts index 8cd4a7ecc121..7480f37e89e8 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts @@ -138,6 +138,24 @@ vdd_sd_dv_pins_default: vdd-sd-dv-pins-default { J784S4_IOPAD(0x020, PIN_INPUT, 7) /* (AJ35) MCAN15_RX.GPIO0_8 */ >; }; + + mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (E32) MCU_OSPI0_CLK */ + J784S4_WKUP_IOPAD(0x02c, PIN_OUTPUT, 0) /* (A32) MCU_OSPI0_CSn0 */ + J784S4_WKUP_IOPAD(0x00c, PIN_INPUT, 0) /* (B33) MCU_OSPI0_D0 */ + J784S4_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (B32) MCU_OSPI0_D1 */ + J784S4_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (C33) MCU_OSPI0_D2 */ + J784S4_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (C35) MCU_OSPI0_D3 */ + J784S4_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (D33) MCU_OSPI0_D4 */ + J784S4_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (D34) MCU_OSPI0_D5 */ + J784S4_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (E34) MCU_OSPI0_D6 */ + J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (E33) MCU_OSPI0_D7 */ + J784S4_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (C34) MCU_OSPI0_DQS */ + J784S4_WKUP_IOPAD(0x03c, PIN_OUTPUT, 6) /* (C32) MCU_OSPI0_CSn3.MCU_OSPI0_ECC_FAIL */ + J784S4_WKUP_IOPAD(0x038, PIN_OUTPUT, 6) /* (B34) MCU_OSPI0_CSn2.MCU_OSPI0_RESET_OUT0 */ + >; + }; }; &main_uart8 { @@ -146,6 +164,32 @@ &main_uart8 { pinctrl-0 = <&main_uart8_pins_default>; }; +&fss { + status = "okay"; +}; + +&ospi0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0x0>; + spi-tx-bus-width = <8>; + spi-rx-bus-width = <8>; + spi-max-frequency = <25000000>; + cdns,tshsl-ns = <60>; + cdns,tsd2d-ns = <60>; + cdns,tchsh-ns = <60>; + cdns,tslch-ns = <60>; + cdns,read-delay = <4>; + cdns,phy-mode; + #address-cells = <1>; + #size-cells = <1>; + }; +}; + &main_i2c0 { status = "okay"; pinctrl-names = "default"; diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi index 93952af618f6..b29b95a532f6 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi @@ -308,4 +308,47 @@ cpts@3d000 { ti,cpts-periodic-outputs = <2>; }; }; + + fss: syscon@47000000 { + compatible = "syscon", "simple-mfd"; + reg = <0x00 0x47000000 0x00 0x100>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + status = "disabled"; + + ospi0: spi@47040000 { + compatible = "ti,am654-ospi", "cdns,qspi-nor"; + reg = <0x00 0x47040000 0x00 0x100>, + <0x5 0x0000000 0x1 0x0000000>; + interrupts = ; + cdns,fifo-depth = <256>; + cdns,fifo-width = <4>; + cdns,trigger-address = <0x0>; + clocks = <&k3_clks 161 7>; + assigned-clocks = <&k3_clks 161 7>; + assigned-clock-parents = <&k3_clks 161 9>; + assigned-clock-rates = <166666666>; + power-domains = <&k3_pds 161 TI_SCI_PD_EXCLUSIVE>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + ospi1: spi@47050000 { + compatible = "ti,am654-ospi", "cdns,qspi-nor"; + reg = <0x00 0x47050000 0x00 0x100>, + <0x7 0x0000000 0x1 0x0000000>; + interrupts = ; + cdns,fifo-depth = <256>; + cdns,fifo-width = <4>; + cdns,trigger-address = <0x0>; + clocks = <&k3_clks 162 7>; + power-domains = <&k3_pds 162 TI_SCI_PD_EXCLUSIVE>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + }; -- 2.34.1