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[2620:137:e000::1:20]) by mx.google.com with ESMTP id x4-20020a17090a8a8400b002342e691837si5757372pjn.21.2023.03.27.02.55.54; Mon, 27 Mar 2023 02:56:05 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=izrSIpBH; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233215AbjC0JzX (ORCPT + 99 others); Mon, 27 Mar 2023 05:55:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52378 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233122AbjC0JzR (ORCPT ); Mon, 27 Mar 2023 05:55:17 -0400 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5DD6A49EA; Mon, 27 Mar 2023 02:55:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1679910909; x=1711446909; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=7IhxYtUl63wNn0Vd3goQKvs/9xlUppgTbWbUbCY2K5A=; b=izrSIpBH0siZv76fdxseD2jQDGcJy3POY0jvCqkpkuJdyDaLlSb5oMm+ bRYMKpoOoap1cn7eil/j1WaoBS58OsjdNbo5xWgnKqZ3vzXr4vceIx43z V7ScG+hNHwcOeTNP26JHTqgjLFwH6iUjN2NzuaI6+1GtKKaojiBzxPy/u B3gnRLnshn192MEgWXH54+3xZpGWStV4t31zC0Zh0DFkjXhFe0Wom3RJS DocBXtEey1j+BJBcIyrdHH8i5ZxMtU27xLGMBT/CKRH7BGKqjV5ZTbuFK cd1Nq2I0yfzqPFEowmMuy0OIrERPEHI4ZYvpxvbc0sYE+Eytcg1V3RM8Q g==; X-IronPort-AV: E=McAfee;i="6600,9927,10661"; a="320626300" X-IronPort-AV: E=Sophos;i="5.98,294,1673942400"; d="scan'208";a="320626300" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Mar 2023 02:55:09 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10661"; a="826983666" X-IronPort-AV: E=Sophos;i="5.98,294,1673942400"; d="scan'208";a="826983666" Received: from smile.fi.intel.com ([10.237.72.54]) by fmsmga001.fm.intel.com with ESMTP; 27 Mar 2023 02:55:06 -0700 Received: from andy by smile.fi.intel.com with local (Exim 4.96) (envelope-from ) id 1pgjZA-009AMh-2f; Mon, 27 Mar 2023 12:55:04 +0300 Date: Mon, 27 Mar 2023 12:55:04 +0300 From: Andy Shevchenko To: William Breathitt Gray , Nathan Chancellor , Nick Desaulniers Cc: Johannes Berg , Al Viro , linux-iio@vger.kernel.org, Jonathan Cameron , Andrew Morton , linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 2/3] counter: 104-quad-8: Refactor to buffer states for CMR, IOR, and IDR Message-ID: References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-Spam-Status: No, score=-2.4 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org +Cc clang (for the ideas you might have, while the issue seems related to GCC[?] ) On Sun, Mar 26, 2023 at 08:01:23PM -0400, William Breathitt Gray wrote: > On Fri, Mar 24, 2023 at 11:35:02AM -0400, William Breathitt Gray wrote: > > There are eight calls to quad8_control_register_update() in 104-quad-8: > > > > quad8_control_register_update(priv, priv->idr, id, DISABLE_INDEX_MODE, INDEX_MODE); > > quad8_control_register_update(priv, priv->cmr, id, mode_cfg, QUADRATURE_MODE); > > quad8_control_register_update(priv, priv->ior, event_node->channel, flg_pins, FLG_PINS); > > quad8_control_register_update(priv, priv->idr, channel_id, index_polarity, INDEX_POLARITY); > > quad8_control_register_update(priv, priv->idr, channel_id, synchronous_mode, INDEX_MODE); > > quad8_control_register_update(priv, priv->cmr, count->id, count_mode, COUNT_MODE); > > quad8_control_register_update(priv, priv->ior, count->id, enable, AB_GATE); > > quad8_control_register_update(priv, priv->ior, count->id, !preset_enable, LOAD_PIN); > > I attempted the cross-compiling using an x86-64 system and I was able to > recreate the build error. I tried to isolate the problem line by > commenting out quad8_control_register_update() calls and discover that > this appears to be an inline issue after all: if there are more than six > calls to quad8_control_register_update() are in the code, then the > '__bad_mask' build error occurs. > > The build error doesn't occur if I force the inline via __always_inline, > so I'll add that to quad8_control_register_update() to resolve this > issue and submit a v3 patchset later this week. Doe it mean it's a compiler error? Or is it a code error? I'm wondering if clang also fails here. -- With Best Regards, Andy Shevchenko