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From:   Jun Li <jun.li@nxp.com>
To:     Andreas Henriksson <andreas@fatal.se>,
        Marco Felsch <m.felsch@pengutronix.de>
CC:     "robh+dt@kernel.org" <robh+dt@kernel.org>,
        "krzysztof.kozlowski+dt@linaro.org" 
        <krzysztof.kozlowski+dt@linaro.org>,
        "shawnguo@kernel.org" <shawnguo@kernel.org>,
        dl-linux-imx <linux-imx@nxp.com>,
        "festevam@gmail.com" <festevam@gmail.com>,
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        <linux-arm-kernel@lists.infradead.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "kernel@pengutronix.de" <kernel@pengutronix.de>,
        Xu Yang <xu.yang_2@nxp.com>
Subject: RE: [PATCH] arm64: dts: imx8mp-evk: add dual-role usb port1 support
Thread-Topic: [PATCH] arm64: dts: imx8mp-evk: add dual-role usb port1 support
Thread-Index: AQHZXXZt5pMZSwGyAE6437fZs85FYq8JtdDggAShbYCAACxV0A==
Date:   Mon, 27 Mar 2023 11:48:51 +0000
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> -----Original Message-----
> From: Andreas Henriksson <andreas@fatal.se>
> Sent: Monday, March 27, 2023 4:50 PM
> To: Jun Li <jun.li@nxp.com>; Marco Felsch <m.felsch@pengutronix.de>
> Cc: robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org;
> shawnguo@kernel.org; dl-linux-imx <linux-imx@nxp.com>; festevam@gmail.com=
;
> linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org;
> kernel@pengutronix.de; Xu Yang <xu.yang_2@nxp.com>
> Subject: Re: [PATCH] arm64: dts: imx8mp-evk: add dual-role usb port1 supp=
ort
>=20
> On Fri, Mar 24, 2023 at 10:18:17AM +0000, Jun Li wrote:
> >
> >
> > > -----Original Message-----
> > > From: Marco Felsch <m.felsch@pengutronix.de>
> > > Sent: Thursday, March 23, 2023 6:58 PM
> > > To: robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org;
> > > shawnguo@kernel.org; dl-linux-imx <linux-imx@nxp.com>;
> > > festevam@gmail.com
> > > Cc: linux-arm-kernel@lists.infradead.org;
> > > linux-kernel@vger.kernel.org; kernel@pengutronix.de
> > > Subject: [PATCH] arm64: dts: imx8mp-evk: add dual-role usb port1
> > > support
> > >
> > > The i.MX8MP-EVK has a dual-role usb-type-c port marked as PORT1. By
> > > this commit the dual-role support is added which allows the
> > > user-space to assign usb-gadget functions to it via the configFS.
> >
> > So just ignore the orientation switch will make this port cannot work
> > at super speed, this is actually why this port is not enabled at upstre=
am.
> > I see the orientation switch via GPIO for SBU is already merged:
> > drivers/usb/typec/mux/gpio-sbu-mux.c
> > Do you have interest to expand this driver to support super speed
> > switch for this case?
> [...]
>=20
> FWIW This is what I ended up with (after backporting the gpio-sbu-mux pat=
ches)
> a little while ago trying to get the usb-c ports going on imx8mp-evk. I'v=
e
> not yet had the time to fully test this (only done host/device, not teste=
d:
> SS, orientation, etc), so beware that it might be completely wrong.

Thanks for the advice.

*reuse* compatible =3D "gpio-sbu-mux"; can make the basic *function* work,
but that's not the right direction, SBU has its own signal in typec connect=
or,
here what we need is the Super Speed signal switch, you can see iMX8MP EVK
use 2 GPIOs control the SS for 3 states(normal orientation, reserve orienta=
tion,
places all channels in high impedance state), but SBU will disable both cha=
nnels
at TYPEC_STATE_USB, this is not correct for USB data, so logically we canno=
t
reuse SBU either. But I think this gpio-sbu-mux.c driver can be extended to
add support super speed signal orientation.

Li Jun=20

>=20
> #include "dt-bindings/usb/pd.h"
>=20
> &usb3_phy0 {
>     vbus-power-supply =3D <&ptn5110>;
>     status =3D "okay";
> };
>=20
> &usb3_0 {
>     status =3D "okay";
> };
>=20
> &usb_dwc3_0 {
>     dr_mode =3D "otg";
>     hnp-disable;
>     srp-disable;
>     adp-disable;
>     usb-role-switch;
>     role-switch-default-mode =3D "peripheral";
>     snps,dis-u1-entry-quirk;
>     snps,dis-u2-entry-quirk;
>     status =3D "okay";
>=20
>     port {
>         usb3_drd_sw: endpoint {
>             remote-endpoint =3D <&typec_dr_sw>;
>         };
>     };
> };
>=20
> &i2c2 {
>     clock-frequency =3D <100000>;
>     pinctrl-names =3D "default";
>     pinctrl-0 =3D <&pinctrl_i2c2>;
>     status =3D "okay";
>=20
>     ptn5110: tcpc@50 {
>         compatible =3D "nxp,ptn5110";
>         pinctrl-names =3D "default";
>         pinctrl-0 =3D <&pinctrl_typec>;
>         reg =3D <0x50>;
>=20
>         interrupt-parent =3D <&gpio4>;
>         interrupts =3D <19 IRQ_TYPE_LEVEL_LOW>;
>         status =3D "okay";
>=20
>         port {
>             typec_dr_sw: endpoint {
>                 remote-endpoint =3D <&usb3_drd_sw>;
>             };
>         };
>=20
>         usb_con: connector {
>             compatible =3D "usb-c-connector";
>             label =3D "USB-C";
>             power-role =3D "dual";
>             data-role =3D "dual";
>             try-power-role =3D "sink";
>             source-pdos =3D <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
>             sink-pdos =3D <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
>                      PDO_VAR(5000, 20000, 3000)>;
>             op-sink-microwatt =3D <15000000>;
>             self-powered;
>=20
>             ports {
>                 #address-cells =3D <1>;
>                 #size-cells =3D <0>;
>=20
>                 port@1 {
>                     reg =3D <1>;
>                     typec_con_ss: endpoint {
>                         remote-endpoint =3D <&usb3_data_ss>;
>                     };
>                 };
>             };
>         };
>     };
>=20
> };
>=20
> &iomuxc {
>     pinctrl_typec: typec1grp {
>         fsl,pins =3D <
>             MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19    0x1c4
>         >;
>     };
>=20
>     pinctrl_typec_mux: typec1muxgrp {
>         fsl,pins =3D <
>             MX8MP_IOMUXC_SAI1_MCLK__GPIO4_IO20    0x16
>             MX8MP_IOMUXC_SD2_WP__GPIO2_IO20        0x16
>         >;
>     };
>=20
>=20
>     pinctrl_i2c2: i2c2grp {
>         fsl,pins =3D <
>             MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL        0x400001c2
>             MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA        0x400001c2
>         >;
>     };
> };
>=20
> / {
>     gpio-sbu-mux {
>         compatible =3D "gpio-sbu-mux";
>=20
>         pinctrl-names =3D "default";
>         pinctrl-0 =3D <&pinctrl_typec_mux>;
>         select-gpios =3D <&gpio4 20 GPIO_ACTIVE_LOW>; // (PAD_)SAI1_MCLK =
->
> USB1_SS_SEL
>         enable-gpios =3D <&gpio2 20 GPIO_ACTIVE_LOW>; // (PAD_)SD2_WP ->
> USB1_TYPEC_EN_B -> TYPEC_EN_B
>=20
>         //mode-switch;
>         orientation-switch;
>=20
>         port {
>             usb3_data_ss: endpoint {
>                 remote-endpoint =3D <&typec_con_ss>;
>             };
>         };
>     };
> };
>=20
> Hope it might help.
>=20
> Regards,
> Andreas Henriksson