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Date:   Mon, 27 Mar 2023 12:09:54 -0700
From:   Eric Biggers <ebiggers@kernel.org>
To:     Bjorn Andersson <andersson@kernel.org>
Cc:     Abel Vesa <abel.vesa@linaro.org>,
        Ulf Hansson <ulf.hansson@linaro.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Andy Gross <agross@kernel.org>,
        Konrad Dybcio <konrad.dybcio@linaro.org>,
        Manivannan Sadhasivam <mani@kernel.org>,
        Alim Akhtar <alim.akhtar@samsung.com>,
        Avri Altman <avri.altman@wdc.com>,
        Bart Van Assche <bvanassche@acm.org>,
        Adrian Hunter <adrian.hunter@intel.com>,
        "James E . J . Bottomley" <jejb@linux.ibm.com>,
        "Martin K . Petersen" <martin.petersen@oracle.com>,
        Herbert Xu <herbert@gondor.apana.org.au>,
        "David S . Miller" <davem@davemloft.net>,
        linux-mmc@vger.kernel.org, devicetree@vger.kernel.org,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        linux-arm-msm@vger.kernel.org, linux-crypto@vger.kernel.org,
        linux-scsi@vger.kernel.org
Subject: Re: [PATCH v4 4/7] soc: qcom: Make the Qualcomm UFS/SDCC ICE a
 dedicated driver
Message-ID: <20230327190954.GE73752@sol.localdomain>
References: <20230327134734.3256974-1-abel.vesa@linaro.org>
 <20230327134734.3256974-5-abel.vesa@linaro.org>
 <20230327185358.c4emwquhouq42itf@ripper>
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On Mon, Mar 27, 2023 at 11:53:58AM -0700, Bjorn Andersson wrote:
> > +int qcom_ice_program_key(struct qcom_ice *ice,
> > +			 u8 algorithm_id, u8 key_size,
> > +			 const u8 crypto_key[], u8 data_unit_size,
> > +			 int slot)
> > +{
> > +	struct device *dev = ice->dev;
> > +	union {
> > +		u8 bytes[AES_256_XTS_KEY_SIZE];
> > +		u32 words[AES_256_XTS_KEY_SIZE / sizeof(u32)];
> > +	} key;
> > +	int i;
> > +	int err;
> > +
> > +	/* Only AES-256-XTS has been tested so far. */
> > +	if (algorithm_id != QCOM_ICE_CRYPTO_ALG_AES_XTS ||
> > +	    key_size != QCOM_ICE_CRYPTO_KEY_SIZE_256) {
> > +		dev_err_ratelimited(dev,
> > +				    "Unhandled crypto capability; algorithm_id=%d, key_size=%d\n",
> > +				    algorithm_id, key_size);
> > +		return -EINVAL;
> > +	}
> > +
> > +	memcpy(key.bytes, crypto_key, AES_256_XTS_KEY_SIZE);
> > +
> > +	/*
> > +	 * The SCM call byte-swaps the 32-bit words of the key.
> > +	 * So we have to do the same, in order for the final key be correct.
> 
> Does it actually byte swap the words, or is the API just specified to
> take the words in big endian format?

[Note, this is existing code I wrote that Abel is just moving to a new file.]

It doesn't write to the input array, if that is what you are asking.  I was
thinking of this as one byte swap cancelling out another.  But sure, the comment
could be simplified to something like the following:

	/* The SCM call requires that the key words be byte-swapped. */

> How come you memcpy + swap in place, instead of loop over the words and
> cpu_to_be32() them into a __be words[] array?
> 
> > +	 */
> > +	for (i = 0; i < ARRAY_SIZE(key.words); i++)
> > +		__cpu_to_be32s(&key.words[i]);

With this approach there is no need to worry about unaligned memory accesses.
It could be done with unaligned memory accesses, though, if you prefer that:

	union {
		[...]
		__be32 words[...];
	} key;

	[...]
		key.words[i] = cpu_to_be32(get_unaligned((__u32 *)crypto_key + i));

- Eric