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Date:   Mon, 27 Mar 2023 23:50:18 +0100
From:   Conor Dooley <conor@kernel.org>
To:     Hal Feng <hal.feng@starfivetech.com>
Cc:     linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
        linux-riscv@lists.infradead.org, Stephen Boyd <sboyd@kernel.org>,
        Michael Turquette <mturquette@baylibre.com>,
        Philipp Zabel <p.zabel@pengutronix.de>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Albert Ou <aou@eecs.berkeley.edu>,
        Ben Dooks <ben.dooks@sifive.com>,
        Daniel Lezcano <daniel.lezcano@linaro.org>,
        Thomas Gleixner <tglx@linutronix.de>,
        Marc Zyngier <maz@kernel.org>,
        Emil Renner Berthing <emil.renner.berthing@canonical.com>,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH v6 00/21] Basic clock, reset & device tree support for
 StarFive JH7110 RISC-V SoC
Message-ID: <29ba8a8d-940d-4b49-bd86-5cd5df002c23@spud>
References: <20230320103750.60295-1-hal.feng@starfivetech.com>
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Hey Hal,

On Mon, Mar 20, 2023 at 06:37:29PM +0800, Hal Feng wrote:
> This patch series adds basic clock, reset & DT support for StarFive
> JH7110 SoC.

Probably obvious at this point given the number of outstanding comments
on this version, but I'm gonna mark this series as "Changes Requested"
on the RISC-V patchwork. I'm not sure what Stephen's cutoff for stuff is,
but I'd like to have stuff ready to go to Arnd for -rc6, so you still
have some time for another revision I think :)

Cheers,
Conor.

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