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Date:   Tue, 28 Mar 2023 09:14:36 +0200
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Subject: Re: [PATCH 1/2] dt-bindings: mmc: arasan,sdci: Add Xilinx Versal Net
 compatible
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To:     "Potthuri, Sai Krishna" <sai.krishna.potthuri@amd.com>,
        Ulf Hansson <ulf.hansson@linaro.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Michal Simek <michal.simek@xilinx.com>,
        Adrian Hunter <adrian.hunter@intel.com>
Cc:     "linux-mmc@vger.kernel.org" <linux-mmc@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
        "linux-arm-kernel@lists.infradead.org" 
        <linux-arm-kernel@lists.infradead.org>,
        "git (AMD-Xilinx)" <git@amd.com>,
        "saikrishna12468@gmail.com" <saikrishna12468@gmail.com>
References: <20230324073630.3194724-1-sai.krishna.potthuri@amd.com>
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From:   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
In-Reply-To: <BY5PR12MB425806889EE700C1FCC8A465DB8B9@BY5PR12MB4258.namprd12.prod.outlook.com>
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On 27/03/2023 11:58, Potthuri, Sai Krishna wrote:
> Hi Krzysztof,
> 
>> -----Original Message-----
>> From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>> Sent: Friday, March 24, 2023 5:14 PM
>> To: Potthuri, Sai Krishna <sai.krishna.potthuri@amd.com>; Ulf Hansson
>> <ulf.hansson@linaro.org>; Rob Herring <robh+dt@kernel.org>; Krzysztof
>> Kozlowski <krzysztof.kozlowski+dt@linaro.org>; Michal Simek
>> <michal.simek@xilinx.com>; Adrian Hunter <adrian.hunter@intel.com>
>> Cc: linux-mmc@vger.kernel.org; linux-kernel@vger.kernel.org;
>> devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; git (AMD-
>> Xilinx) <git@amd.com>; saikrishna12468@gmail.com
>> Subject: Re: [PATCH 1/2] dt-bindings: mmc: arasan,sdci: Add Xilinx Versal Net
>> compatible
>>
>> On 24/03/2023 08:36, Sai Krishna Potthuri wrote:
>>> Add Xilinx Versal Net compatible to support eMMC 5.1 PHY.
>>>
>>> Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
>>> ---
>>>  Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml | 6 ++++++
>>>  1 file changed, 6 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml
>>> b/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml
>>> index 8296c34cfa00..cf44a4b988a7 100644
>>> --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml
>>> +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml
>>> @@ -27,6 +27,7 @@ allOf:
>>>              enum:
>>>                - xlnx,zynqmp-8.9a
>>>                - xlnx,versal-8.9a
>>> +              - xlnx,versal-net-5.1-emmc
>>
>> v5.1 is eMMC standard or Versal block version? If the first, it's not suitable for
>> compatibles.
>>
>> Also, what's the difference from xlnx,versal-8.9a?
> V5.1 is an eMMC standard and this compatible is defined based on sdhci arasan
> eMMC5.1 Host Controller(arasan,sdhci-5.1), where as in Versal, it’s a different
> controller and it is based on 4.51 Host Controller(arasan,sdhci-8.9a).

Mixing IP block versions and eMMC spec versions in one binding is a
great way to confuse.

> Versal Net Compatible is defined it this way to make it inline with the other
> existing SoC compatibles like "intel,keembay-sdhci-5.1-emmc".
> Please suggest if the compatible need to be renamed to "xlnx,versal-net-emmc"?

Is Versal Net uniquely identifying your SoC or IP block?

> 
> Regards
> Sai Krishna
> 
>>
>>>      then:
>>>        properties:
>>>          clock-output-names:
>>> @@ -62,6 +63,11 @@ properties:
>>>          description:
>>>            For this device it is strongly suggested to include
>>>            clock-output-names and '#clock-cells'.
>>> +      - items:
>>> +          - const: xlnx,versal-net-5.1-emmc     # Versal Net eMMC PHY

You do not have items here, so move it to respective place at beginning,
just like others are defined.


Best regards,
Krzysztof