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[2003:e4:1f1c:800:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id sd24-20020a170906ce3800b00931024e96c5sm15350868ejb.99.2023.03.28.03.42.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Mar 2023 03:42:02 -0700 (PDT) Date: Tue, 28 Mar 2023 12:42:00 +0200 From: Thierry Reding To: Sumit Gupta Cc: treding@nvidia.com, krzysztof.kozlowski@linaro.org, dmitry.osipenko@collabora.com, viresh.kumar@linaro.org, rafael@kernel.org, jonathanh@nvidia.com, robh+dt@kernel.org, lpieralisi@kernel.org, linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, mmaddireddy@nvidia.com, kw@linux.com, bhelgaas@google.com, vidyas@nvidia.com, sanjayc@nvidia.com, ksitaraman@nvidia.com, ishah@nvidia.com, bbasu@nvidia.com Subject: Re: [Patch v4 01/10] dt-bindings: memory: tegra: add bpmp ref in tegra234-mc node Message-ID: References: <20230327161426.32639-1-sumitg@nvidia.com> <20230327161426.32639-2-sumitg@nvidia.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="wf4WgXMFCZE62Nbf" Content-Disposition: inline In-Reply-To: <20230327161426.32639-2-sumitg@nvidia.com> User-Agent: Mutt/2.2.9 (2022-11-12) X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --wf4WgXMFCZE62Nbf Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Mar 27, 2023 at 09:44:17PM +0530, Sumit Gupta wrote: > For Tegra234, add the "nvidia,bpmp" property within the Memory > Controller (MC) node to reference BPMP node. This is needed in > the MC driver to pass the client info to the BPMP-FW when memory > interconnect support is available. >=20 > Signed-off-by: Sumit Gupta > --- > .../bindings/memory-controllers/nvidia,tegra186-mc.yaml | 7 +++++++ > 1 file changed, 7 insertions(+) >=20 > diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,= tegra186-mc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvi= dia,tegra186-mc.yaml > index 935d63d181d9..398d27bb2373 100644 > --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra18= 6-mc.yaml > +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra18= 6-mc.yaml > @@ -58,6 +58,10 @@ properties: > "#interconnect-cells": > const: 1 > =20 > + nvidia,bpmp: > + $ref: /schemas/types.yaml#/definitions/phandle > + description: phandle of the node representing the BPMP > + > patternProperties: > "^external-memory-controller@[0-9a-f]+$": > description: > @@ -220,6 +224,9 @@ allOf: > - const: ch14 > - const: ch15 > =20 > + nvidia,bpmp: > + description: phandle of the node representing the BPMP > + Why do we need this one? There's already an nvidia,bpmp phandle defined in the patternProperties section for external memory controllers. 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