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Date:   Tue, 28 Mar 2023 14:56:39 +0200
From:   Miquel Raynal <miquel.raynal@bootlin.com>
To:     Martin Kurbanov <mmkurbanov@sberdevices.ru>
Cc:     Richard Weinberger <richard@nod.at>,
        Vignesh Raghavendra <vigneshr@ti.com>,
        Dmitry Rokosov <ddrokosov@sberdevices.ru>,
        Chuanhong Guo <gch981213@gmail.com>,
        Aidan MacDonald <aidanmacdonald.0x0@gmail.com>,
        Felix Matouschek <felix@matouschek.org>, <kernel@kempniu.pl>,
        <linux-kernel@vger.kernel.org>, <linux-mtd@lists.infradead.org>,
        <kernel@sberdevices.ru>
Subject: Re: [PATCH v3] mtd: spinand: add support for ESMT F50x1G41LB
Message-ID: <20230328145639.1aef44e2@xps-13>
In-Reply-To: <20230322151625.791131-1-mmkurbanov@sberdevices.ru>
References: <20230322151625.791131-1-mmkurbanov@sberdevices.ru>
Organization: Bootlin
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Hi Martin,

mmkurbanov@sberdevices.ru wrote on Wed, 22 Mar 2023 18:16:25 +0300:

> From: Chuanhong Guo <gch981213@gmail.com>
>=20
> This patch adds support for ESMT F50L1G41LB and F50D1G41LB.
> It seems that ESMT likes to use random JEDEC ID from other vendors.
> Their 1G chips uses 0xc8 from GigaDevice and 2G/4G chips uses 0x2c from
> Micron. For this reason, the ESMT entry is named esmt_c8 with explicit
> JEDEC ID in variable name.

I was about to merge this patch but it turns out there are conflicts in
the tree. Can you please rebase on top of nand/next and send a v4?

>=20
> Datasheets:
> https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/F50L1G41LB(2M).pdf
> https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/F50D1G41LB(2M).pdf
>=20
> Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
> Signed-off-by: Martin Kurbanov <mmkurbanov@sberdevices.ru>
> Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
> Tested-by: Martin Kurbanov <mmkurbanov@sberdevices.ru>

Thanks,
Miqu=C3=A8l