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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , kernel@axis.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH net] net: dsa: mv88e6xxx: Reset mv88e6393x watchdog register Message-ID: References: <20230328115511.400145-1-gustav.ekelund@axis.com> <20230328120604.zawfeskqs4yhlze6@kandell> <9ba1722a-8dd7-4d6d-bade-b4c702c8387f@lunn.ch> <20230328124754.oscahd3wtod6vkfy@kandell> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Mar 28, 2023 at 03:34:03PM +0200, Gustav Ekelund wrote: > 1) Marvell has confirmed that 6393x (Amethyst) differs from 6390 (Peridot) > with quote: “I tried this on my board and see G2 offset 0x1B index 12 bit 0 > does not clear, I also tried doing a SWReset and the bit is still 1. I did > try the same on a Peridot board and it clears as advertised.” > > 2) Marvell are not aware of any other stuck bits, but has confirmed that the > WD event bits are not cleared on SW reset which is indeed contradictory to > what the data sheet suggests. Hi Gustav Please expand the commit message with a summary of this information. It answers the questions both Marek and i have been asking, so deserves to be in the commit message. Andrew