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Date:   Tue, 28 Mar 2023 06:59:04 -0700
From:   "H. Peter Anvin" <hpa@zytor.com>
To:     Saurabh Sengar <ssengar@linux.microsoft.com>, tglx@linutronix.de,
        mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com,
        x86@kernel.org, johan+linaro@kernel.org, isaku.yamahata@intel.com,
        mikelley@microsoft.com, linux-kernel@vger.kernel.org,
        andriy.shevchenko@intel.com, ssengar@linux.microsoft.com
Subject: =?US-ASCII?Q?Re=3A_=5BPATCH_v2=5D_x86/ioapic=3A_Don=27t_ret?= =?US-ASCII?Q?urn_0_from_arch=5Fdynirq=5Flower=5Fbound=28=29?=
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On March 28, 2023 12:30:04 AM PDT, Saurabh Sengar <ssengar@linux=2Emicrosof=
t=2Ecom> wrote:
>arch_dynirq_lower_bound() is invoked by the core interrupt code to
>retrieve the lowest possible Linux interrupt number for dynamically
>allocated interrupts like MSI=2E
>
>The x86 implementation uses this to exclude the IO/APIC GSI space=2E
>This works correctly as long as there is an IO/APIC registered, but
>returns 0 if not=2E This has been observed in VMs where the BIOS does
>not advertise an IO/APIC=2E
>
>0 is an invalid interrupt number except for the legacy timer interrupt
>on x86=2E The return value is unchecked in the core code, so it ends up
>to allocate interrupt number 0 which is subsequently considered to be
>invalid by the caller, e=2Eg=2E the MSI allocation code=2E
>
>The function has already a check for 0 in the case that an IO/APIC is
>registered, but ioapic_dynirq_base is 0 in case of device tree setups=2E
>
>Consolidate this and zero check for both ioapic_dynirq_base and gsi_top,
>which is used in the case that no IO/APIC is registered=2E
>
>Fixes: 3e5bedc2c258 ("x86/apic: Fix arch_dynirq_lower_bound() bug for DT =
enabled machines")
>Co-developed-by: Thomas Gleixner <tglx@linutronix=2Ede>
>Signed-off-by: Thomas Gleixner <tglx@linutronix=2Ede>
>Signed-off-by: Saurabh Sengar <ssengar@linux=2Emicrosoft=2Ecom>
>Cc: Andy Shevchenko <andriy=2Eshevchenko@intel=2Ecom>
>Cc: Thomas Gleixner <tglx@linutronix=2Ede>
>---
>[V2]
>- Edit commit message
>- Consolidated the 0 check for ioapic_dynirq_base as well
>
> arch/x86/kernel/apic/io_apic=2Ec | 14 +++++++++-----
> 1 file changed, 9 insertions(+), 5 deletions(-)
>
>diff --git a/arch/x86/kernel/apic/io_apic=2Ec b/arch/x86/kernel/apic/io_a=
pic=2Ec
>index 1f83b052bb74=2E=2Ef980b38b0227 100644
>--- a/arch/x86/kernel/apic/io_apic=2Ec
>+++ b/arch/x86/kernel/apic/io_apic=2Ec
>@@ -2477,17 +2477,21 @@ static int io_apic_get_redir_entries(int ioapic)
>=20
> unsigned int arch_dynirq_lower_bound(unsigned int from)
> {
>+	unsigned int ret;
>+
> 	/*
> 	 * dmar_alloc_hwirq() may be called before setup_IO_APIC(), so use
> 	 * gsi_top if ioapic_dynirq_base hasn't been initialized yet=2E
> 	 */
>-	if (!ioapic_initialized)
>-		return gsi_top;
>+	ret =3D ioapic_dynirq_base ? : gsi_top;
>+
> 	/*
>-	 * For DT enabled machines ioapic_dynirq_base is irrelevant and not
>-	 * updated=2E So simply return @from if ioapic_dynirq_base =3D=3D 0=2E
>+	 * For DT enabled machines ioapic_dynirq_base is irrelevant and
>+	 * always 0=2E gsi_top can be 0 if there is no IO/APIC registered=2E
>+	 * 0 is an invalid interrupt number for dynamic allocations=2E Return
>+	 * @from instead=2E
> 	 */
>-	return ioapic_dynirq_base ? : from;
>+	return ret ? : from;
> }
>=20
> #ifdef CONFIG_X86_32

Is there any reason why this variable can't be initialized to a fixed nonz=
ero number, like 16?