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[2620:137:e000::1:20]) by mx.google.com with ESMTP id k190-20020a6384c7000000b004fb9330dcfcsi30913954pgd.323.2023.03.28.13.41.00; Tue, 28 Mar 2023 13:41:11 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=sntech.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229579AbjC1Uf6 convert rfc822-to-8bit (ORCPT + 99 others); Tue, 28 Mar 2023 16:35:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51242 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229485AbjC1Uf5 (ORCPT ); Tue, 28 Mar 2023 16:35:57 -0400 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4BF961985; Tue, 28 Mar 2023 13:35:54 -0700 (PDT) Received: from ip4d1634d3.dynamic.kabel-deutschland.de ([77.22.52.211] helo=diego.localnet) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1phG1v-0007Q3-E5; Tue, 28 Mar 2023 22:34:55 +0200 From: Heiko =?ISO-8859-1?Q?St=FCbner?= To: Palmer Dabbelt , Evan Green Cc: slewis@rivosinc.com, vineetg@rivosinc.com, Conor Dooley , Evan Green , Albert Ou , Andrew Bresticker , Andrew Jones , Andrew Morton , Anup Patel , Arnd Bergmann , Atish Patra , Bagas Sanjaya , Catalin Marinas , Celeste Liu , Conor Dooley , Dao Lu , Guo Ren , Jann Horn , Jisheng Zhang , Jonathan Corbet , Ley Foon Tan , Mark Brown , Mike Kravetz , Nathan Chancellor , Palmer Dabbelt , Paul Walmsley , Peter Xu , Philipp Tomsich , Randy Dunlap , Samuel Holland , Shuah Khan , Sunil V L , Tobias Klauser , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-riscv@lists.infradead.org Subject: Re: [PATCH v5 0/6] RISC-V Hardware Probing User Interface Date: Tue, 28 Mar 2023 22:34:53 +0200 Message-ID: <8238271.NyiUUSuA9g@diego> In-Reply-To: <20230327163203.2918455-1-evan@rivosinc.com> References: <20230327163203.2918455-1-evan@rivosinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8BIT Content-Type: text/plain; charset="iso-8859-1" X-Spam-Status: No, score=0.0 required=5.0 tests=SPF_PASS,T_SPF_HELO_TEMPERROR autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Am Montag, 27. M?rz 2023, 18:31:57 CEST schrieb Evan Green: > > There's been a bunch of off-list discussions about this, including at > Plumbers. The original plan was to do something involving providing an > ISA string to userspace, but ISA strings just aren't sufficient for a > stable ABI any more: in order to parse an ISA string users need the > version of the specifications that the string is written to, the version > of each extension (sometimes at a finer granularity than the RISC-V > releases/versions encode), and the expected use case for the ISA string > (ie, is it a U-mode or M-mode string). That's a lot of complexity to > try and keep ABI compatible and it's probably going to continue to grow, > as even if there's no more complexity in the specifications we'll have > to deal with the various ISA string parsing oddities that end up all > over userspace. > > Instead this patch set takes a very different approach and provides a set > of key/value pairs that encode various bits about the system. The big > advantage here is that we can clearly define what these mean so we can > ensure ABI stability, but it also allows us to encode information that's > unlikely to ever appear in an ISA string (see the misaligned access > performance, for example). The resulting interface looks a lot like > what arm64 and x86 do, and will hopefully fit well into something like > ACPI in the future. > > The actual user interface is a syscall, with a vDSO function in front of > it. The vDSO function can answer some queries without a syscall at all, > and falls back to the syscall for cases it doesn't have answers to. > Currently we prepopulate it with an array of answers for all keys and > a CPU set of "all CPUs". This can be adjusted as necessary to provide > fast answers to the most common queries. > > An example series in glibc exposing this syscall and using it in an > ifunc selector for memcpy can be found at [1]. I'm about to send a v2 > of that series out that incorporates the vDSO function. > > I was asked about the performance delta between this and something like > sysfs. I created a small test program [2] and ran it on a Nezha D1 > Allwinner board. Doing each operation 100000 times and dividing, these > operations take the following amount of time: > - open()+read()+close() of /sys/kernel/cpu_byteorder: 3.8us > - access("/sys/kernel/cpu_byteorder", R_OK): 1.3us > - riscv_hwprobe() vDSO and syscall: .0094us > - riscv_hwprobe() vDSO with no syscall: 0.0091us Looks like this series spawned a thread on one of the riscv-lists [0]. As auxvals were mentioned in that thread, I was wondering what's the difference between doing a new syscall vs. putting the keys + values as architecture auxvec elements [1] ? I'm probably missing some simple issue but from looking at that stuff I fathom RISCV_HWPROBE_KEY_BASE_BEHAVIOR could also just be AT_RISCV_BASE_BEHAVIOR ? Heiko [0] https://lists.riscv.org/g/sig-toolchains/topic/97886491 [1] https://elixir.bootlin.com/linux/latest/source/arch/riscv/include/uapi/asm/auxvec.h