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Subject: Re: [PATCH v6 08/12] arm64: dts: nuvoton: Add initial ma35d1 device tree
From:   Stephen Boyd <sboyd@kernel.org>
Cc:     devicetree@vger.kernel.org, linux-clk@vger.kernel.org,
        linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org,
        arnd@arndb.de, schung@nuvoton.com, mjchen@nuvoton.com,
        Jacky Huang <ychuang3@nuvoton.com>
To:     Jacky Huang <ychuang570808@gmail.com>, gregkh@linuxfoundation.org,
        jirislaby@kernel.org, krzysztof.kozlowski+dt@linaro.org,
        lee@kernel.org, mturquette@baylibre.com, p.zabel@pengutronix.de,
        robh+dt@kernel.org
Date:   Tue, 28 Mar 2023 20:54:36 -0700
User-Agent: alot/0.10
Precedence: bulk

Quoting Jacky Huang (2023-03-28 20:43:23)
> On 2023/3/29 =E4=B8=8A=E5=8D=88 11:25, Stephen Boyd wrote:
> > Quoting Jacky Huang (2023-03-28 20:13:11)
> >> I may not explain clearly enough. The lock/unlock register of system
> >> controller is more like
> >> a kind of write protection for specific registers, rather than
> >> preventing hetero-core CPU access.
> >> In many different IP of ma35d1 contain write protected registers.
> >> In fact, ma35d1 has a "hardware semaphore" IP, and we have implemented
> >> the driver in drivers/hwspinlock.
> >> Even the control register of "hardware semaphore" is also write protec=
ted.
> > What's the need to lock and unlock the registers? Is some other
> > processor also writing to the registers that we need to synchronize
> > against? Or is Linux the only entity reading and writing the registers?
> > I'm wondering if we should simply unlock the registers and never lock
> > them.

Can you answer this question?

> >
> >> So, should we implement a system controller driver to provide
> >> register_unlock() function?
> >> Is it OK to have such a driver in drivers/mfd?
> >> Or, just use syscon in device tree for those devices that have write
> >> protect registers.
> >>
> > The hwspinlock framework doesn't require there to be another entity
> > accessing some resource. It's there to implement hardware locks. I don't
> > see why it can't be used here.
>=20
> The current usage of register lock/unlock protect is as the following cod=
e:
>=20
> static void ma35d1_unlock_regs(struct ma35d1_clk_pll *pll)
> {
>  =C2=A0=C2=A0 =C2=A0int ret;
>=20
>  =C2=A0=C2=A0 =C2=A0do {
>  =C2=A0=C2=A0 =C2=A0=C2=A0=C2=A0=C2=A0 regmap_write(pll->regmap, REG_SYS_=
RLKTZNS, 0x59);
>  =C2=A0=C2=A0 =C2=A0=C2=A0=C2=A0=C2=A0 regmap_write(pll->regmap, REG_SYS_=
RLKTZNS, 0x16);
>  =C2=A0=C2=A0 =C2=A0=C2=A0=C2=A0=C2=A0 regmap_write(pll->regmap, REG_SYS_=
RLKTZNS, 0x88);
>  =C2=A0=C2=A0 =C2=A0=C2=A0=C2=A0=C2=A0 regmap_read(pll->regmap, REG_SYS_R=
LKTZNS, &ret);
>  =C2=A0=C2=A0 =C2=A0} while (ret =3D=3D 0);
> }
>=20
> static void ma35d1_lock_regs(struct ma35d1_clk_pll *pll)
> {
>  =C2=A0=C2=A0 =C2=A0regmap_write(pll->regmap, REG_SYS_RLKTZNS, 0x0);
> }
>=20
> And the following code is to unlock registers for write and then lock aga=
in.
>=20
>  =C2=A0=C2=A0=C2=A0 ma35d1_unlock_regs(pll);
>  =C2=A0=C2=A0 =C2=A0writel_relaxed(reg_ctl[0], pll->ctl0_base);
>  =C2=A0=C2=A0 =C2=A0writel_relaxed(reg_ctl[1], pll->ctl1_base);
>  =C2=A0=C2=A0 =C2=A0writel_relaxed(reg_ctl[2], pll->ctl2_base);
>  =C2=A0=C2=A0 =C2=A0ma35d1_lock_regs(pll);
>=20
> The above code is from the clk-ma35d1-pll.c from this patchset.

Yeah I understand that you write some registers in the syscon to lock
the registers.

>=20
> We just employ regmap mechansim for the access to REG_SYS_RLKTZNS registe=
r.
> Is this implementation OK for you?=C2=A0 Thank you.
>=20

No. Why can't that be a hwspinlock? Or why can't it be unlocked all the
time and rely on software spinlocks in the kernel to prevent concurrent
access to the registers accessed by a driver, like a lock for the clk
registers and a lock for the reset registers, etc. Or if no two clks or
resets exist within one 32-bit word then no lock is necessary.