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Received: from DS7SPRMB0009.namprd12.prod.outlook.com (2603:10b6:8:87::10) by IA1PR12MB6042.namprd12.prod.outlook.com (2603:10b6:208:3d6::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6178.38; Wed, 29 Mar 2023 08:20:17 +0000 Received: from DS7SPRMB0009.namprd12.prod.outlook.com ([fe80::57de:d785:91de:d205]) by DS7SPRMB0009.namprd12.prod.outlook.com ([fe80::57de:d785:91de:d205%5]) with mapi id 15.20.6178.041; Wed, 29 Mar 2023 08:20:17 +0000 Message-ID: Date: Wed, 29 Mar 2023 13:50:02 +0530 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.8.1 Subject: Re: [PATCH v2 4/8] iommu/vt-d: Reserve RID_PASID from global SVA PASID space Content-Language: en-US To: Baolu Lu , Jacob Pan , LKML , iommu@lists.linux.dev, Jason Gunthorpe , Joerg Roedel , dmaengine@vger.kernel.org, vkoul@kernel.org Cc: Robin Murphy , Will Deacon , David Woodhouse , Raj Ashok , "Tian, Kevin" , Yi Liu , "Yu, Fenghua" , Dave Jiang , Tony Luck , "Zanussi, Tom" References: <20230327232138.1490712-1-jacob.jun.pan@linux.intel.com> <20230327232138.1490712-5-jacob.jun.pan@linux.intel.com> <41d31adf-577e-431c-c400-2708885400c1@linux.intel.com> From: Vasant Hegde In-Reply-To: <41d31adf-577e-431c-c400-2708885400c1@linux.intel.com> Content-Type: text/plain; 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We >> should not treat RID_PASID special instead let it be allocated from the >> global SVA PASID number space. > > It's same to AMD and ARM SMMUv3, right? They also need an explicit > reservation of PASID 0. Yes for AMD driver. (Requests from the I/O device without a PASID are treated as if they have PASID of 0). -Vasant