Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
From:   Mao Jinlong <quic_jinlmao@quicinc.com>
To:     Alexander Shishkin <alexander.shishkin@linux.intel.com>,
        Andy Gross <agross@kernel.org>,
        Bjorn Andersson <andersson@kernel.org>,
        Konrad Dybcio <konrad.dybcio@linaro.org>,
        Mathieu Poirier <mathieu.poirier@linaro.org>,
        Suzuki K Poulose <suzuki.poulose@arm.com>,
        Mike Leach <mike.leach@linaro.org>,
        Leo Yan <leo.yan@linaro.org>, Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
CC:     Mao Jinlong <quic_jinlmao@quicinc.com>,
        <linux-arm-kernel@lists.infradead.org>,
        <linux-kernel@vger.kernel.org>, <coresight@lists.linaro.org>,
        <devicetree@vger.kernel.org>, <linux-arm-msm@vger.kernel.org>,
        Tingwei Zhang <quic_tingweiz@quicinc.com>,
        Yuanfang Zhang <quic_yuanfang@quicinc.com>,
        Tao Zhang <quic_taozha@quicinc.com>,
        Hao Zhang <quic_hazha@quicinc.com>
Subject: [PATCH v1 8/8] dt-bindings: arm: Add support for TPDM CMB element size
Date:   Wed, 29 Mar 2023 01:47:44 -0700
Message-ID: <20230329084744.5705-9-quic_jinlmao@quicinc.com>
In-Reply-To: <20230329084744.5705-1-quic_jinlmao@quicinc.com>
References: <20230329084744.5705-1-quic_jinlmao@quicinc.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Content-Type: text/plain
Precedence: bulk

Add property "qcom,cmb-elem-size" to support CMB element for TPDM.
The associated aggregator will read this size before it is enabled.
CMB element size currently only supports 8-bit, 32-bit and 64-bit.

Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
---
 .../bindings/arm/qcom,coresight-tpdm.yaml        | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
index 283dfb39d46f..c5169de81e58 100644
--- a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
+++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
@@ -53,6 +53,14 @@ properties:
     minimum: 32
     maximum: 64
 
+  qcom,cmb-element-size:
+    description:
+      Specifies the CMB (Continuous multi-bit) element size supported by
+      the monitor. The associated aggregator will read this size before it
+      is enabled. CMB element size currently supports 8-bit, 32-bit, 64-bit.
+    $ref: /schemas/types.yaml#/definitions/uint32
+    enum: [8, 32, 64]
+
   qcom,dsb_msr_num:
     description:
       Specifies the number of DSB(Discrete Single Bit) MSR(mux select register)
@@ -95,6 +103,12 @@ required:
   - clocks
   - clock-names
 
+anyOf:
+  - required:
+      - qcom,dsb_msr_num
+  - required:
+      - qcom,cmb-msr-num
+
 additionalProperties: false
 
 examples:
@@ -105,6 +119,8 @@ examples:
       reg = <0x0684c000 0x1000>;
 
       qcom,dsb-element-size = <32>;
+      qcom,cmb-element-size = <32>;
+
       qcom,dsb_msr_num = <16>;
       qcom,cmb-msr-num = <6>;
 
-- 
2.39.0