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[83.9.3.225]) by smtp.gmail.com with ESMTPSA id u3-20020a056512040300b0048b365176d9sm5467581lfk.286.2023.03.29.04.30.50 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 29 Mar 2023 04:30:51 -0700 (PDT) Message-ID: <95b4bd56-b307-6c72-494f-e9b190df8d74@linaro.org> Date: Wed, 29 Mar 2023 13:30:49 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.9.0 Subject: Re: [PATCH 2/7] clk: qcom: add the GPUCC driver for sa8775p Content-Language: en-US To: Bartosz Golaszewski , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, Shazad Hussain , Stephen Boyd , Michael Turquette , Bartosz Golaszewski References: <20230328193632.226095-1-brgl@bgdev.pl> <20230328193632.226095-3-brgl@bgdev.pl> From: Konrad Dybcio In-Reply-To: <20230328193632.226095-3-brgl@bgdev.pl> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 28.03.2023 21:36, Bartosz Golaszewski wrote: > From: Shazad Hussain > > Add the clock driver for the Qualcomm Graphics Clock control module. > > Cc: Stephen Boyd > Cc: Michael Turquette > Signed-off-by: Shazad Hussain > [Bartosz: make ready for upstream] > Co-authored-by: Bartosz Golaszewski > Signed-off-by: Bartosz Golaszewski > --- [...] > +/* Need to match the order of clocks in DT binding */ > +enum { > + DT_IFACE, I think it's never used? [...] > +static int gpu_cc_sa8775p_probe(struct platform_device *pdev) > +{ > + struct regmap *regmap; > + > + regmap = qcom_cc_map(pdev, &gpu_cc_sa8775p_desc); > + if (IS_ERR(regmap)) > + return PTR_ERR(regmap); > + > + clk_lucid_evo_pll_configure(&gpu_cc_pll0, regmap, &gpu_cc_pll0_config); > + clk_lucid_evo_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); > + > + /* > + * Keep the clocks always-ON > + * GPU_CC_CB_CLK > + */ > + regmap_update_bits(regmap, 0x93a4, BIT(0), BIT(0)); You set it as CRITICAL, this should be unnecessary now. Konrad > + > + return qcom_cc_really_probe(pdev, &gpu_cc_sa8775p_desc, regmap); > +} > + > +static struct platform_driver gpu_cc_sa8775p_driver = { > + .probe = gpu_cc_sa8775p_probe, > + .driver = { > + .name = "gpu_cc-sa8775p", > + .of_match_table = gpu_cc_sa8775p_match_table, > + }, > +}; > + > +static int __init gpu_cc_sa8775p_init(void) > +{ > + return platform_driver_register(&gpu_cc_sa8775p_driver); > +} > +subsys_initcall(gpu_cc_sa8775p_init); > + > +static void __exit gpu_cc_sa8775p_exit(void) > +{ > + platform_driver_unregister(&gpu_cc_sa8775p_driver); > +} > +module_exit(gpu_cc_sa8775p_exit); > + > +MODULE_DESCRIPTION("SA8775P GPUCC driver"); > +MODULE_LICENSE("GPL");