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Wysocki" Date: Wed, 29 Mar 2023 14:21:57 +0200 Message-ID: Subject: Re: [PATCH v3 21/24] thermal: intel: hfi: Implement model-specific checks for task classification To: Ricardo Neri Cc: "Rafael J. Wysocki" , "Peter Zijlstra (Intel)" , Juri Lelli , Vincent Guittot , Ricardo Neri , "Ravi V. Shankar" , Ben Segall , Daniel Bristot de Oliveira , Dietmar Eggemann , Len Brown , Mel Gorman , "Rafael J. Wysocki" , Srinivas Pandruvada , Steven Rostedt , Tim Chen , Valentin Schneider , Lukasz Luba , Ionela Voinescu , x86@kernel.org, "Joel Fernandes (Google)" , linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, "Tim C . Chen" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT X-Spam-Status: No, score=0.5 required=5.0 tests=FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Mar 29, 2023 at 2:04 AM Ricardo Neri wrote: > > On Mon, Mar 27, 2023 at 07:03:08PM +0200, Rafael J. Wysocki wrote: > > On Tue, Feb 7, 2023 at 6:02 AM Ricardo Neri > > wrote: > > > > > > In Alder Lake and Raptor Lake, the result of thread classification is more > > > accurate when only one SMT sibling is busy. Classification results for > > > class 2 and 3 are always reliable. > > > > > > To avoid unnecessary migrations, only update the class of a task if it has > > > been the same during 4 consecutive user ticks. > > > > > > Cc: Ben Segall > > > Cc: Daniel Bristot de Oliveira > > > Cc: Dietmar Eggemann > > > Cc: Ionela Voinescu > > > Cc: Joel Fernandes (Google) > > > Cc: Len Brown > > > Cc: Lukasz Luba > > > Cc: Mel Gorman > > > Cc: Rafael J. Wysocki > > > Cc: Srinivas Pandruvada > > > Cc: Steven Rostedt > > > Cc: Tim C. Chen > > > Cc: Valentin Schneider > > > Cc: x86@kernel.org > > > Cc: linux-pm@vger.kernel.org > > > Cc: linux-kernel@vger.kernel.org > > > Signed-off-by: Ricardo Neri > > > --- > > > Changes since v2: > > > * None > > > > > > Changes since v1: > > > * Adjusted the result the classification of Intel Thread Director to start > > > at class 1. Class 0 for the scheduler means that the task is > > > unclassified. > > > * Used the new names of the IPC classes members in task_struct. > > > * Reworked helper functions to use sched_smt_siblings_idle() to query > > > the idle state of the SMT siblings of a CPU. > > > --- > > > drivers/thermal/intel/intel_hfi.c | 60 ++++++++++++++++++++++++++++++- > > > 1 file changed, 59 insertions(+), 1 deletion(-) > > > > > > diff --git a/drivers/thermal/intel/intel_hfi.c b/drivers/thermal/intel/intel_hfi.c > > > index 35d947f47550..fdb53e4cabc1 100644 > > > --- a/drivers/thermal/intel/intel_hfi.c > > > +++ b/drivers/thermal/intel/intel_hfi.c > > > @@ -40,6 +40,7 @@ > > > #include > > > > > > #include > > > +#include > > > > > > #include "../thermal_core.h" > > > #include "intel_hfi.h" > > > @@ -209,9 +210,64 @@ static int __percpu *hfi_ipcc_scores; > > > */ > > > #define HFI_UNCLASSIFIED_DEFAULT 1 > > > > > > +#define CLASS_DEBOUNCER_SKIPS 4 > > > + > > > +/** > > > + * debounce_and_update_class() - Process and update a task's classification > > > + * > > > + * @p: The task of which the classification will be updated > > > + * @new_ipcc: The new IPC classification > > > + * > > > + * Update the classification of @p with the new value that hardware provides. > > > + * Only update the classification of @p if it has been the same during > > > + * CLASS_DEBOUNCER_SKIPS consecutive ticks. > > > + */ > > > +static void debounce_and_update_class(struct task_struct *p, u8 new_ipcc) > > > +{ > > > + u16 debounce_skip; > > > + > > > + /* The class of @p changed. Only restart the debounce counter. */ > > > + if (p->ipcc_tmp != new_ipcc) { > > > + p->ipcc_cntr = 1; > > > + goto out; > > > + } > > > + > > > + /* > > > + * The class of @p did not change. Update it if it has been the same > > > + * for CLASS_DEBOUNCER_SKIPS user ticks. > > > + */ > > > + debounce_skip = p->ipcc_cntr + 1; > > > + if (debounce_skip < CLASS_DEBOUNCER_SKIPS) > > > + p->ipcc_cntr++; > > > + else > > > + p->ipcc = new_ipcc; > > > + > > > +out: > > > + p->ipcc_tmp = new_ipcc; > > > +} > > > > Why does the code above belong to the Intel HFI driver? It doesn't > > look like there is anything driver-specific in it. > > That is a good point. This post-processing is specific to the > implementation of IPCC classes using Intel Thread Director. Well, the implementation-specific part is the processor model check whose only contribution is to say whether or not the classification is valid. The rest appears to be fairly generic to me. > Maybe a new file called drivers/thermal/intel/intel_itd.c would be better? So which part of this code other than the processor model check mentioned above is Intel-specific?