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[78.11.189.27]) by smtp.gmail.com with ESMTPSA id c26-20020ac244ba000000b004dc4feeb7c6sm5767060lfm.65.2023.03.30.00.54.40 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 30 Mar 2023 00:54:40 -0700 (PDT) Message-ID: Date: Thu, 30 Mar 2023 09:54:39 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.9.0 Subject: Re: [PATCH v1 8/8] dt-bindings: arm: Add support for TPDM CMB element size Content-Language: en-US To: Mao Jinlong , Alexander Shishkin , Andy Gross , Bjorn Andersson , Konrad Dybcio , Mathieu Poirier , Suzuki K Poulose , Mike Leach , Leo Yan , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, Tingwei Zhang , Yuanfang Zhang , Tao Zhang , Hao Zhang References: <20230329084744.5705-1-quic_jinlmao@quicinc.com> <20230329084744.5705-9-quic_jinlmao@quicinc.com> From: Krzysztof Kozlowski In-Reply-To: <20230329084744.5705-9-quic_jinlmao@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 29/03/2023 10:47, Mao Jinlong wrote: > Add property "qcom,cmb-elem-size" to support CMB element for TPDM. > The associated aggregator will read this size before it is enabled. > CMB element size currently only supports 8-bit, 32-bit and 64-bit. > > Signed-off-by: Mao Jinlong > --- > .../bindings/arm/qcom,coresight-tpdm.yaml | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml > index 283dfb39d46f..c5169de81e58 100644 > --- a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml > +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml > @@ -53,6 +53,14 @@ properties: > minimum: 32 > maximum: 64 > > + qcom,cmb-element-size: s/size/bits/ https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/property-units.yaml > + description: > + Specifies the CMB (Continuous multi-bit) element size supported by > + the monitor. The associated aggregator will read this size before it > + is enabled. CMB element size currently supports 8-bit, 32-bit, 64-bit. > + $ref: /schemas/types.yaml#/definitions/uint32 > + enum: [8, 32, 64] > + > qcom,dsb_msr_num: > description: > Specifies the number of DSB(Discrete Single Bit) MSR(mux select register) > @@ -95,6 +103,12 @@ required: > - clocks > - clock-names > > +anyOf: > + - required: > + - qcom,dsb_msr_num There is no such property. > + - required: > + - qcom,cmb-msr-num Why this is part of this patch? > + > additionalProperties: false > > examples: > @@ -105,6 +119,8 @@ examples: > reg = <0x0684c000 0x1000>; > > qcom,dsb-element-size = <32>; > + qcom,cmb-element-size = <32>; > + > qcom,dsb_msr_num = <16>; > qcom,cmb-msr-num = <6>; > Best regards, Krzysztof