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Date:   Thu, 30 Mar 2023 09:55:18 -0500
From:   Nishanth Menon <nm@ti.com>
To:     Hari Nagalla <hnagalla@ti.com>
CC:     <vigneshr@ti.com>, <kristo@kernel.org>, <robh+dt@kernel.org>,
        <krzysztof.kozlowski+dt@linaro.org>,
        <linux-arm-kernel@lists.infradead.org>,
        <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 0/2] Add R5F and C71 DSP nodes for J784S4 SoC
Message-ID: <20230330145518.icy53f4jdmqqonzt@shrink>
References: <20230330141536.22480-1-hnagalla@ti.com>
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On 09:15-20230330, Hari Nagalla wrote:
> This series adds the R5F cluster and C71 DSP processor nodes for
> J784S4 SoC.
> 
> The first patch adds R5F cluster nodes to the MAIN and MCU voltage 
> domains of J784S4 SoC. The second patch adds the C71 DSP processor 
> nodes to the MAIN voltage domain of J784S4 SoC.
> 
> Changes in V2:
> - Removed default disable of R5F nodes in the SoC device tree.
> - Consolidated R5F nodes into one patch.
> 
> V1: https://lore.kernel.org/all/20230329093627.30719-1-hnagalla@ti.com/
> 
> Hari Nagalla (2):
>   arm64: dts: ti: k3-j784s4-main: Add R5F cluster nodes
>   arm64: dts: ti: k3-j784s4-main: Add C71x DSP nodes
> 
>  arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi    | 168 ++++++++++++++++++
>  .../boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi     |  40 +++++
>  2 files changed, 208 insertions(+)
> 
> -- 
> 2.17.1
> 

No specific need for board file memory reservations for DDR?

-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D