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J . Bottomley" , "Martin K . Petersen" , Herbert Xu , "David S . Miller" , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, Linux Kernel Mailing List , linux-arm-msm@vger.kernel.org, linux-crypto@vger.kernel.org, linux-scsi@vger.kernel.org Subject: Re: [PATCH v4 5/7] scsi: ufs: ufs-qcom: Switch to the new ICE API Message-ID: References: <20230327134734.3256974-1-abel.vesa@linaro.org> <20230327134734.3256974-6-abel.vesa@linaro.org> <20230327181934.GD1882@sol.localdomain> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230327181934.GD1882@sol.localdomain> X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 23-03-27 11:19:34, Eric Biggers wrote: > Hi Abel, > > On Mon, Mar 27, 2023 at 04:47:32PM +0300, Abel Vesa wrote: > > Now that there is a new dedicated ICE driver, drop the ufs-qcom-ice and > > use the new ICE api provided by the Qualcomm soc driver ice. The platforms > > that already have ICE support will use the API as library since there will > > not be a devicetree node, but instead they have reg range. In this case, > > the of_qcom_ice_get will return an ICE instance created for the consumer's > > device. But if there are platforms that do not have ice reg in the > > consumer devicetree node and instead provide a dedicated ICE devicetree > > node, the of_qcom_ice_get will look up the device based on qcom,ice > > property and will get the ICE instance registered by the probe function > > of the ice driver. > > > > Signed-off-by: Abel Vesa > > I am still worried about the ICE clock. Are you sure it is being managed > correctly? With your patch, the ICE clock gets enabled in ufs_qcom_ice_resume > and disabled in ufs_qcom_ice_suspend, which hopefully pair up. But it also gets > enabled in ufs_qcom_ice_enable which isn't paired with anything. Also, this all > happens at a different time from the existing UFS clocks being enabled/disabled. Right, I messed this up since the last version. Sorry about that. What I need to do is to drop the enabling of the clock from qcom_ice_enable and only do it from qcom_ice_resume. As for disabling it, it remains as is, that is, in qcom_ice_disable. Then, I need to enable the clock right before checking the supported version. I'll do that with devm_clk_get_enabled (also optional for the legacy once as I explained in the reply to the 6th patch). > > I wonder if the ICE clock should be enabled/disabled in ufs_qcom_setup_clocks() > instead of what you are doing currently? > > > +static int ufs_qcom_ice_init(struct ufs_qcom_host *host) > > +{ > > + struct ufs_hba *hba = host->hba; > > + struct device *dev = hba->dev; > > + > > + host->ice = of_qcom_ice_get(dev); > > + if (host->ice == ERR_PTR(-EOPNOTSUPP)) { > > + dev_warn(dev, "Disabling inline encryption support\n"); > > + hba->caps &= ~UFSHCD_CAP_CRYPTO; > > + host->ice = NULL; > > + } > > + > > + if (IS_ERR(host->ice)) > > + return PTR_ERR(host->ice); > > + > > + return 0; > > +} > > This is still sometimes leaving UFSHCD_CAP_CRYPTO set in cases where ICE is > unsupported. > > Moving the *setting* of UFSHCD_CAP_CRYPTO into here would fix that. > I'll do exactly that. Thanks. > It is also hard to understand how the -EOPNOTSUPP case differs from the NULL > case. Can you add a comment? Or just consider keeping the original behavior, > which did not distinguish between these cases (as long as MASK_CRYPTO_SUPPORT > was set in REG_CONTROLLER_CAPABILITIES, which was checked first). I believe it makes more sense to return -EOPNOTSUPP when the driver doesn't support a specific version of the HW. If you do not agree, I'll make it return NULL then. > > - Eric