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[2620:137:e000::1:20]) by mx.google.com with ESMTP id og40-20020a1709071de800b009333dc25e58si1616548ejc.109.2023.03.31.02.04.05; Fri, 31 Mar 2023 02:04:30 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=PQajI09p; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231849AbjCaJBd (ORCPT + 99 others); Fri, 31 Mar 2023 05:01:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44130 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231659AbjCaJBC (ORCPT ); Fri, 31 Mar 2023 05:01:02 -0400 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 325C919A5; Fri, 31 Mar 2023 02:01:01 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 32V90pO2056095; Fri, 31 Mar 2023 04:00:51 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1680253251; bh=i65uxzals5Wc7/nEFCZYr1OHgGiVGabsZDLJ0+DvW1g=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=PQajI09pHClsLs5jrS4N6GSe08MUvnyWz+7jwg7VYsFqOBu0Pw1HnWVDiLLjHctN9 bUe9OlCzj2CRoI7RjFVmWuS8iJ4H1SVSEEirJ4NENACp3HYfEe0aX1qVIpVh8BCR6X dOUWqOpZyhlAWuKOPd63US5h0xlW+iA9gHF4Sc2Q= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 32V90pqA128603 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 31 Mar 2023 04:00:51 -0500 Received: from DFLE105.ent.ti.com (10.64.6.26) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Fri, 31 Mar 2023 04:00:51 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Fri, 31 Mar 2023 04:00:51 -0500 Received: from uda0500640.dal.design.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 32V90Sud125579; Fri, 31 Mar 2023 04:00:48 -0500 From: Ravi Gunasekaran To: , , , , , , , , CC: , , Subject: [PATCH v14 5/8] arm64: dts: ti: k3-j721s2-common-proc-board: Add USB support Date: Fri, 31 Mar 2023 14:30:25 +0530 Message-ID: <20230331090028.8373-6-r-gunasekaran@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230331090028.8373-1-r-gunasekaran@ti.com> References: <20230331090028.8373-1-r-gunasekaran@ti.com> MIME-Version: 1.0 Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-2.5 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_PASS, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Aswath Govindraju The board uses lane 1 of SERDES for USB. Set the mux accordingly. The USB controller and EVM supports super-speed for USB0 on the Type-C port. However, the SERDES has a limitation that up to 2 protocols can be used at a time. The SERDES is wired for PCIe, eDP and USB super-speed. It has been chosen to use PCIe and eDP as default. So restrict USB0 to high-speed mode. Signed-off-by: Aswath Govindraju Signed-off-by: Matt Ranostay Signed-off-by: Ravi Gunasekaran --- I had reviewed this patch in the v5 series [0]. Since I'm taking over upstreaming this series, I removed the self Reviewed-by tag. [0] - https://lore.kernel.org/all/96058a13-4903-2b8c-8de2-f37fdfd3672b@ti.com/ Changes from v13: * No changes. Only rebased on top of linux-next Changes from v12: * No change Changes from v11: * No change Changes from v10: * Removed Link tag from commit message Changes from v9: * Enabled USB nodes Changes from v8: * No change Changes from v7: * No change Changes from v6: * No change Changes from v5: * Removed Cc tags from commit message Changes from v4: * No change Changes from v3: * No change Changes from v2: * No change Changes from v1: * No change .../dts/ti/k3-j721s2-common-proc-board.dts | 23 +++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts index 1afefaf3f974..5c4ffb8124ca 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts @@ -147,6 +147,12 @@ J721S2_IOPAD(0x020, PIN_INPUT, 7) /* (AA23) MCAN15_RX.GPIO0_8 */ >; }; + + main_usbss0_pins_default: main-usbss0-pins-default { + pinctrl-single,pins = < + J721S2_IOPAD(0x0ec, PIN_OUTPUT, 6) /* (AG25) TIMER_IO1.USB0_DRVVBUS */ + >; + }; }; &wkup_pmx0 { @@ -345,6 +351,23 @@ }; }; +&usb_serdes_mux { + idle-states = <1>; /* USB0 to SERDES lane 1 */ +}; + +&usbss0 { + status = "okay"; + pinctrl-0 = <&main_usbss0_pins_default>; + pinctrl-names = "default"; + ti,vbus-divider; + ti,usb2-only; +}; + +&usb0 { + dr_mode = "otg"; + maximum-speed = "high-speed"; +}; + &mcu_mcan0 { status = "okay"; pinctrl-names = "default"; -- 2.17.1