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Message-ID: <28d0ce4d-afca-55ee-b471-fe02e71ab262@ti.com>
Date:   Fri, 31 Mar 2023 04:31:39 -0500
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Subject: Re: [PATCH v2 0/2] Add R5F and C71 DSP nodes for J784S4 SoC
To:     Nishanth Menon <nm@ti.com>
CC:     <vigneshr@ti.com>, <kristo@kernel.org>, <robh+dt@kernel.org>,
        <krzysztof.kozlowski+dt@linaro.org>,
        <linux-arm-kernel@lists.infradead.org>,
        <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
References: <20230330141536.22480-1-hnagalla@ti.com>
 <20230330145518.icy53f4jdmqqonzt@shrink>
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From:   Hari Nagalla <hnagalla@ti.com>
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On 3/30/23 09:55, Nishanth Menon wrote:
>>   arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi    | 168 ++++++++++++++++++
>>   .../boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi     |  40 +++++
>>   2 files changed, 208 insertions(+)
>>
>> -- 
>> 2.17.1
>>
> No specific need for board file memory reservations for DDR?
They are needed in board file, but to be submitted in separate patch set.