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From:   Fabio Estevam <festevam@gmail.com>
Date:   Fri, 31 Mar 2023 07:29:14 -0300
Message-ID: <CAOMZO5A3shnqV9A18f1JOx-dmn9MzFznv9gHr-g5fJw75LByOg@mail.gmail.com>
Subject: Re: [PATCH] clk: imx: imx6sx: spdif clock rate is too high for asrc
To:     "Peng Fan (OSS)" <peng.fan@oss.nxp.com>
Cc:     abelvesa@kernel.org, abel.vesa@linaro.org, mturquette@baylibre.com,
        sboyd@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de,
        kernel@pengutronix.de, linux-imx@nxp.com,
        linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-kernel@vger.kernel.org,
        Shengjiu Wang <shengjiu.wang@nxp.com>,
        Peng Fan <peng.fan@nxp.com>
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On Fri, Mar 31, 2023 at 4:15=E2=80=AFAM Peng Fan (OSS) <peng.fan@oss.nxp.co=
m> wrote:
>
> From: Shengjiu Wang <shengjiu.wang@nxp.com>
>
> spdif clock is one of the asrc clock source, which is used
> for ideal ratio mode. when set to 98.304MHz, it cause the
> divider of asrc input clock and output clock exceed the
> maximum value, and asrc driver saturate the value to maximum
> value, which will cause the ASRC's performance very bad.
> So we need to set spdif clock to a proper rate. which make asrc
> divider not exceed maximum value, at least one of divider not
> exceed maximum value.
> The target is spdif clock rate / output(or input) sample rate
> less than 1024(which is maximum divider).

Please add a Fixes tag.