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[2620:137:e000::1:20]) by mx.google.com with ESMTP id bx15-20020a17090af48f00b00234ba2fe34bsi1729025pjb.102.2023.03.31.04.11.26; Fri, 31 Mar 2023 04:11:37 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@crly.cz header.s=gm1 header.b=ZY2HadDt; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231909AbjCaLFo (ORCPT + 99 others); Fri, 31 Mar 2023 07:05:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39152 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232256AbjCaLFF (ORCPT ); Fri, 31 Mar 2023 07:05:05 -0400 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::226]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5D9ED1EA26 for ; Fri, 31 Mar 2023 04:03:22 -0700 (PDT) Received: (Authenticated sender: me@crly.cz) by mail.gandi.net (Postfix) with ESMTPSA id CF9F4C0008; Fri, 31 Mar 2023 11:02:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crly.cz; s=gm1; t=1680260578; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Fgmk/mwe5whG0BvKW+Z4uq6pXrcxqgZ9/TVRoi9sWUA=; b=ZY2HadDt2JF8K1PV9nVTSFDSJAjXCqYQsRmHyPNh/OHG7bIQO4PNhjxdtXN9wA0+PL38tW WbDh1gA0BXiZWen9rXj6rZbrGNqFMNmSgKJ6eSU5X2OV7eGMQPNSAOanjnIuLLq/bScptt PEsgeVvppmCBnBdUKEBCISCKYiduBfoN/CIAxFkRbAQxljb5V3/9rLAazwDnH6WZoS/nYG 51FmXo1jSLdNPp4WKyrLzhjU7DdOeoY+qWLaedGlvq7WgvFdsCBY1Wm39UpPKnuWHIBYh+ jhGmYiNq58lGUkrOLUigAPQdpr0h9KcczO8/cpix3TcrYpo/2ofL+Jkhf1U/kA== From: Roman Beranek To: Maxime Ripard , Chen-Yu Tsai , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland Cc: dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 2/3] ARM: dts: sunxi: rename tcon's clock output Date: Fri, 31 Mar 2023 13:02:44 +0200 Message-Id: <20230331110245.43527-3-me@crly.cz> X-Mailer: git-send-email 2.32.0 (Apple Git-132) In-Reply-To: <20230331110245.43527-1-me@crly.cz> References: <20230331110245.43527-1-me@crly.cz> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org While the rate of TCON0's DCLK matches dotclock for parallel and LVDS outputs, this doesn't hold for DSI. According manuals from Allwinner, DCLK is an abbrebiation of Data Clock, not dotclock, so go with that instead. Signed-off-by: Roman Beranek --- arch/arm/boot/dts/sun5i.dtsi | 2 +- arch/arm/boot/dts/sun8i-a23-a33.dtsi | 2 +- arch/arm/boot/dts/sun8i-a83t.dtsi | 2 +- arch/arm/boot/dts/sun8i-v3s.dtsi | 2 +- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi index 250d6b87ab4d..2f901a013676 100644 --- a/arch/arm/boot/dts/sun5i.dtsi +++ b/arch/arm/boot/dts/sun5i.dtsi @@ -286,7 +286,7 @@ tcon0: lcd-controller@1c0c000 { clock-names = "ahb", "tcon-ch0", "tcon-ch1"; - clock-output-names = "tcon-pixel-clock"; + clock-output-names = "tcon-data-clock"; #clock-cells = <0>; status = "disabled"; diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi index f630ab55bb6a..ddc87cc15e51 100644 --- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi +++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi @@ -190,7 +190,7 @@ tcon0: lcd-controller@1c0c000 { clock-names = "ahb", "tcon-ch0", "lvds-alt"; - clock-output-names = "tcon-pixel-clock"; + clock-output-names = "tcon-data-clock"; #clock-cells = <0>; resets = <&ccu RST_BUS_LCD>, <&ccu RST_BUS_LVDS>; diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index 82fdb04122ca..94eb3bfc989e 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -456,7 +456,7 @@ tcon0: lcd-controller@1c0c000 { interrupts = ; clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>; clock-names = "ahb", "tcon-ch0"; - clock-output-names = "tcon-pixel-clock"; + clock-output-names = "tcon-data-clock"; #clock-cells = <0>; resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>; reset-names = "lcd", "lvds"; diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi index db194c606fdc..ab2a0e1235e4 100644 --- a/arch/arm/boot/dts/sun8i-v3s.dtsi +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi @@ -191,7 +191,7 @@ tcon0: lcd-controller@1c0c000 { <&ccu CLK_TCON0>; clock-names = "ahb", "tcon-ch0"; - clock-output-names = "tcon-pixel-clock"; + clock-output-names = "tcon-data-clock"; #clock-cells = <0>; resets = <&ccu RST_BUS_TCON0>; reset-names = "lcd"; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index 62f45f71ec65..e3b17575699c 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -407,7 +407,7 @@ tcon0: lcd-controller@1c0c000 { interrupts = ; clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>; clock-names = "ahb", "tcon-ch0"; - clock-output-names = "tcon-pixel-clock"; + clock-output-names = "tcon-data-clock"; #clock-cells = <0>; resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>; reset-names = "lcd", "lvds"; -- 2.32.0 (Apple Git-132)