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Shutemov" Cc: David Laight , 'Wu Zongyong' , "kirill.shutemov@linux.intel.com" , "tglx@linutronix.de" , "mingo@redhat.com" , "dave.hansen@linux.intel.com" , "x86@kernel.org" , "linux-kernel@vger.kernel.org" , "tony.luck@intel.com" , "wutu.xq2@linux.alibaba.com" References: <1655f5dc49ab77f94e350ecbdc93e8d9b31acf61.1680058548.git.wuzongyong@linux.alibaba.com> <20230330123951.b5vujv67c7q3dhay@box.shutemov.name> <20230331022414.GB435@L-PF27918B-1352.localdomain> <94c3f7ba1caa45f7ba503cde6e0c79d2@AcuMS.aculab.com> <20230331100620.mkqg72vwhmlliunn@box.shutemov.name> <2220e2f1-2c91-e054-c107-a761fdfe7ffb@amd.com> <20230331140916.ofb7ecrjpg7shaav@box> From: Tom Lendacky In-Reply-To: <20230331140916.ofb7ecrjpg7shaav@box> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: SA9PR13CA0104.namprd13.prod.outlook.com (2603:10b6:806:24::19) To DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM4PR12MB5229:EE_|SJ2PR12MB8942:EE_ X-MS-Office365-Filtering-Correlation-Id: 0bb051f7-31ac-47b4-1884-08db31f4e7ac X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Shutemov wrote: > On Fri, Mar 31, 2023 at 08:40:30AM -0500, Tom Lendacky wrote: >> On 3/31/23 05:06, Kirill A. Shutemov wrote: >>> On Fri, Mar 31, 2023 at 08:49:48AM +0000, David Laight wrote: >>>> From: Wu Zongyong >>>>> Sent: 31 March 2023 03:24 >>>>> >>>>> On Thu, Mar 30, 2023 at 03:39:51PM +0300, kirill.shutemov@linux.intel.com wrote: >>>>>> On Wed, Mar 29, 2023 at 10:59:37AM +0800, Wu Zongyong wrote: >>>>>>> It seems MOVSXD which opcode is 0x63 is not handled, support >>>>>>> to decode it in insn_decode_mmio(). >>>>>> >>>>>> Do you have a particular user in mind? >>>>> To be honest, I don't find a specific user which uses the MOVSXD. >>>>> >>>>> But both Intel and AMD's instructions reference contains MOVSXD and lots >>>>> of MOVSXD instructions occur when I "objdump -S vmlinux", so I think it >>>>> may be useful to support it in insn_decode_mmio(). >>>>> >>>>> Are there some special consideration about this instruction? >>>> >>>> It is a sign-extending memory read (32bit to 64bit). >>>> You pretty much never want to do that to a device register. >>>> Also kernel code should be using readl() (etc) which do >>>> unsigned reads. >>>> So they should never happen for mmio. >>>> >>>> Of course, if you mmap() PCIe space directly into a program's >>>> address space anything might happen ... >>> >>> There are two users of the interface: TDX and SEV. TDX doesn't allow >>> userspace MMIO. SEV *seems* allows it, but I am not sure how it is safe. >>> >>> Tom? >> >> The insn_decode_mmio() function is only called by the SEV/TDX related code >> and is specifically MMIO oriented. As David said, this instruction is likely >> not being used for that in the kernel. If we come across a case where this >> is used, we can look at how it is being used in that situation and it can be >> addressed then. > > I was asking if SEV supports userspace MMIO. And if yes, how do you make > it safe? > No, SEV doesn't support userspace MMIO. Thanks, Tom