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Date:   Fri, 31 Mar 2023 10:51:06 -0500
From:   Nishanth Menon <nm@ti.com>
To:     Hari Nagalla <hnagalla@ti.com>
CC:     <vigneshr@ti.com>, <kristo@kernel.org>, <robh+dt@kernel.org>,
        <krzysztof.kozlowski+dt@linaro.org>,
        <linux-arm-kernel@lists.infradead.org>,
        <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 0/2] Add R5F and C71 DSP nodes for J784S4 SoC
Message-ID: <20230331155106.fqz34ocerrgd6vnw@facility>
References: <20230330141536.22480-1-hnagalla@ti.com>
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 <28d0ce4d-afca-55ee-b471-fe02e71ab262@ti.com>
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On 04:31-20230331, Hari Nagalla wrote:
> On 3/30/23 09:55, Nishanth Menon wrote:
> > >   arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi    | 168 ++++++++++++++++++
> > >   .../boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi     |  40 +++++
> > >   2 files changed, 208 insertions(+)
> > > 
> > > -- 
> > > 2.17.1
> > > 
> > No specific need for board file memory reservations for DDR?
> They are needed in board file, but to be submitted in separate patch set.

Sorry, NAK, please submit as a single series.

-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D