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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: microsoft.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BYAPR21MB1688.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 81021994-3b80-4864-3c4d-08db3323081d X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Apr 2023 02:36:15.5692 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 72f988bf-86f1-41af-91ab-2d7cd011db47 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: uPWunkEJbaK2iAIYoEm36fgvcMmAMYa5AEGwAhycIcNqQyZmwCvXPnn0sjQZc05u5ehLWcjSeymtfhYTfv+Z1qNCEQroWfjPj+cnwGRIZ08= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR21MB1909 X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Juergen Gross Sent: Friday, March 31, 2023 11:37 PM >=20 > In order to avoid mappings using the UC- cache attribute, set the > MTRR state to use WB caching as the default. >=20 > This is needed in order to cope with the fact that PAT is enabled, > while MTRRs are not supported by the hypervisor. >=20 > Fixes: 90b926e68f50 ("x86/pat: Fix pat_x_mtrr_type() for MTRR disabled ca= se") > Signed-off-by: Juergen Gross > Tested-by: Michael Kelley I've tested the full v5 series in a Hyper-V SEV-SNP guest with vTOM. All l= ooks good. The following output appears in dmesg, which I think matches expecta= tions: [ 0.004000] MTRR map: 0 entries (0 fixed + 0 variable; max 0), built fro= m 0 variable MTRRs [ 0.004000] MTRRs set to read-only [ 0.004000] x86/PAT: Configuration [0-7]: WB WC UC- UC WB WP UC- WT The page attributes listed in /sys/kernel/debug/x86/pat_memtype_list are "write-back" in the expected cases, and the "mtrr" x86 feature no longer ap= pears in the "flags" output of "lscpu" or /proc/cpuinfo. /proc/mtrr does not exi= st, again as expected. > --- > V2: > - new patch > --- > arch/x86/kernel/cpu/mshyperv.c | 4 ++++ > 1 file changed, 4 insertions(+) >=20 > diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyper= v.c > index f36dc2f796c5..0a6cc3cf8919 100644 > --- a/arch/x86/kernel/cpu/mshyperv.c > +++ b/arch/x86/kernel/cpu/mshyperv.c > @@ -34,6 +34,7 @@ > #include > #include > #include > +#include >=20 > /* Is Linux running as the root partition? */ > bool hv_root_partition; > @@ -408,6 +409,9 @@ static void __init ms_hyperv_init_platform(void) > #ifdef CONFIG_SWIOTLB > swiotlb_unencrypted_base =3D > ms_hyperv.shared_gpa_boundary; > #endif > + > + /* Set WB as the default cache mode. */ > + mtrr_overwrite_state(NULL, 0, MTRR_TYPE_WRBACK); The placement of this call needs to change due to a patch set I submitted a= nd that Boris has accepted into the 'tip' tree for the 6.4 merge window (so it= 's now in linux-next). The call should be placed in the function hv_vtom_init() i= n the source file arch/x86/hyperv/ivm.c. Anywhere in hv_vtom_init() is fine -- I= would suggest at the end. Minor request: In a v6 of this patch set, please include me on all the patc= hes in the series so I can easily keep track of how it is progressing. Michael > } > /* Isolation VMs are unenlightened SEV-based VMs, thus this check: */ > if (IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT)) { > -- > 2.35.3