Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
Date:   Mon, 3 Apr 2023 08:47:35 +0100
From:   Conor Dooley <conor.dooley@microchip.com>
To:     Hal Feng <hal.feng@starfivetech.com>
CC:     Conor Dooley <conor@kernel.org>, <linux-clk@vger.kernel.org>,
        <devicetree@vger.kernel.org>, <linux-riscv@lists.infradead.org>,
        Stephen Boyd <sboyd@kernel.org>,
        Michael Turquette <mturquette@baylibre.com>,
        Philipp Zabel <p.zabel@pengutronix.de>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Albert Ou <aou@eecs.berkeley.edu>,
        Ben Dooks <ben.dooks@sifive.com>,
        Daniel Lezcano <daniel.lezcano@linaro.org>,
        Thomas Gleixner <tglx@linutronix.de>,
        Marc Zyngier <maz@kernel.org>,
        Emil Renner Berthing <emil.renner.berthing@canonical.com>,
        <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v7 00/22] Basic clock, reset & device tree support for
 StarFive JH7110 RISC-V SoC
Message-ID: <1eda304a-a8e0-4f19-bfe4-8793052f73a9@spud>
References: <20230401111934.130844-1-hal.feng@starfivetech.com>
 <acb36897-8085-4f41-9b68-b243467ffc6f@spud>
 <ce4ee037-c53c-5bd4-8968-437ee21c9c51@starfivetech.com>
MIME-Version: 1.0
Content-Type: multipart/signed; micalg=pgp-sha256;
        protocol="application/pgp-signature"; boundary="QEXRWawa+Yd/Oc16"
Content-Disposition: inline
In-Reply-To: <ce4ee037-c53c-5bd4-8968-437ee21c9c51@starfivetech.com>
Precedence: bulk

--QEXRWawa+Yd/Oc16
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
Content-Transfer-Encoding: quoted-printable

On Mon, Apr 03, 2023 at 03:30:32PM +0800, Hal Feng wrote:
> On Sun, 2 Apr 2023 20:19:41 +0100, Conor Dooley wrote:
> > On Sat, Apr 01, 2023 at 07:19:12PM +0800, Hal Feng wrote:

> > And the rest as riscv-jh7110_clk_reset:
> > MAINTAINERS: generalise StarFive clk/reset entries
>=20
> For this patch, I find something to improve.
> 1. Could you please help me sort the StarFive entries in MAINTAINERS?
> "STARFIVE JH71X0 CLOCK DRIVERS" should be added after
> "STARFIVE JH7110 MMC/SD/SDIO DRIVER".
>=20
> 2. A "S" should be added at the end of
> "STARFIVE JH7100 RESET CONTROLLER DRIVER".
>=20
> I have tested your branch and have no comments on the other patches.

Done:
diff --git a/MAINTAINERS b/MAINTAINERS
index f405114bf096..0a701632b0b5 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -19907,6 +19907,12 @@ M:     Emil Renner Berthing <kernel@esmil.dk>
 S:     Maintained
 F:     arch/riscv/boot/dts/starfive/
=20
+STARFIVE JH7110 MMC/SD/SDIO DRIVER
+M:     William Qiu <william.qiu@starfivetech.com>
+S:     Supported
+F:     Documentation/devicetree/bindings/mmc/starfive*
+F:     drivers/mmc/host/dw_mmc-starfive.c
+
 STARFIVE JH71X0 CLOCK DRIVERS
 M:     Emil Renner Berthing <kernel@esmil.dk>
 M:     Hal Feng <hal.feng@starfivetech.com>
@@ -19915,12 +19921,6 @@ F:     Documentation/devicetree/bindings/clock/sta=
rfive,jh71*.yaml
 F:     drivers/clk/starfive/clk-starfive-jh71*
 F:     include/dt-bindings/clock/starfive?jh71*.h
=20
-STARFIVE JH7110 MMC/SD/SDIO DRIVER
-M:     William Qiu <william.qiu@starfivetech.com>
-S:     Supported
-F:     Documentation/devicetree/bindings/mmc/starfive*
-F:     drivers/mmc/host/dw_mmc-starfive.c
-
 STARFIVE JH71X0 PINCTRL DRIVERS
 M:     Emil Renner Berthing <kernel@esmil.dk>
 M:     Jianlong Huang <jianlong.huang@starfivetech.com>
@@ -19931,7 +19931,7 @@ F:      drivers/pinctrl/starfive/pinctrl-starfive-j=
h71*
 F:     include/dt-bindings/pinctrl/pinctrl-starfive-jh7100.h
 F:     include/dt-bindings/pinctrl/starfive,jh7110-pinctrl.h
=20
-STARFIVE JH71X0 RESET CONTROLLER DRIVER
+STARFIVE JH71X0 RESET CONTROLLER DRIVERS
 M:     Emil Renner Berthing <kernel@esmil.dk>
 M:     Hal Feng <hal.feng@starfivetech.com>
 S:     Maintained

 Cheers,
 Conor.

--QEXRWawa+Yd/Oc16
Content-Type: application/pgp-signature; name="signature.asc"

-----BEGIN PGP SIGNATURE-----

iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZCqElwAKCRB4tDGHoIJi
0sqbAQCMsACpQzkzhLoKfCAGm331fVF+ABaBHJYSyLnVCVgBVAEAmAp9CCOzimm4
keaJvJy+j9w82evuGi+U1ktFrXhXDQs=
=7zTB
-----END PGP SIGNATURE-----

--QEXRWawa+Yd/Oc16--