Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
Mime-Version: 1.0
Content-Transfer-Encoding: quoted-printable
Content-Type: text/plain; charset=UTF-8
Date:   Mon, 03 Apr 2023 19:22:47 +0200
Message-Id: <CRNAMDCKUUBK.3PPU45G9W5IRQ@iMac.local>
From:   "Roman Beranek" <me@crly.cz>
To:     "Frank Oltmanns" <frank@oltmanns.dev>
Cc:     "Maxime Ripard" <mripard@kernel.org>,
        "Chen-Yu Tsai" <wens@csie.org>, "David Airlie" <airlied@gmail.com>,
        "Daniel Vetter" <daniel@ffwll.ch>,
        "Jernej Skrabec" <jernej.skrabec@gmail.com>,
        "Samuel Holland" <samuel@sholland.org>,
        <dri-devel@lists.freedesktop.org>,
        <linux-arm-kernel@lists.infradead.org>,
        <linux-sunxi@lists.linux.dev>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 3/3] drm: sun4i: calculate proper DCLK rate for DSI
References: <20230331110245.43527-1-me@crly.cz>
 <20230331110245.43527-4-me@crly.cz> <87h6tya70h.fsf@oltmanns.dev>
 <CRN65FVKWIUG.1VSDAH8INXQMT@iMac.local> <87pm8lj709.fsf@oltmanns.dev>
In-Reply-To: <87pm8lj709.fsf@oltmanns.dev>
Precedence: bulk

On Mon Apr 3, 2023 at 5:08 PM CEST, Frank Oltmanns wrote:
>
> On 2023-04-03 at 15:52:36 +0200, "Roman Beranek" <me@crly.cz> wrote:
> > As little a change as setting .clock in the default mode of PP's panel
> > to 73500 can fix it. Better yet, dropping pll-video0-2x from the set
> > of acceptable parents for tcon0 fixes it universally. And that's what
> > megi's kernel does, though the measure was introduced with a different
> > rationale:
> > <https://github.com/megous/linux/commit/7374d5756aa0cc3f11e494e3cbc54f6=
c7c01e1a8>
>
> For sake of completeness, the patch you referenced builds on this patch:
> https://github.com/megous/linux/commit/45e0aa8d9e34
>
> Are you saying that your other boards and panels work without these
> patches?

Yes, that was a bit of an oversight on my side as I wrote drivers for
both panels already with the intention of them being used besides
an HDMI output in mind, so I've deliberately picked a timing in each
case such that the dotclock lines up nicely with pll-video0 at 297 MHz.

All the best
Roman Beranek