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[83.9.3.135]) by smtp.gmail.com with ESMTPSA id u22-20020a2e2e16000000b002a260e3a5bdsm1860320lju.27.2023.04.03.11.05.39 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 03 Apr 2023 11:05:41 -0700 (PDT) Message-ID: <8b8540a9-505a-2b68-c246-fabba0f5fc37@linaro.org> Date: Mon, 3 Apr 2023 20:05:38 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.9.1 Subject: Re: [PATCH 1/5] dt-bindings: clock: qcom,gpucc: Fix SM6350 clock names Content-Language: en-US From: Konrad Dybcio To: Krzysztof Kozlowski , Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , AngeloGioacchino Del Regno Cc: Marijn Suijten , Rob Herring , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20230315-topic-lagoon_gpu-v1-0-a74cbec4ecfc@linaro.org> <20230315-topic-lagoon_gpu-v1-1-a74cbec4ecfc@linaro.org> <1d0c894b-ccd4-348f-0c48-c6a5c89df27d@linaro.org> <63037930-8ce4-532c-2e1a-0711005bdd77@linaro.org> In-Reply-To: <63037930-8ce4-532c-2e1a-0711005bdd77@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-1.5 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 17.03.2023 13:11, Konrad Dybcio wrote: > > > On 17.03.2023 09:37, Krzysztof Kozlowski wrote: >> On 16/03/2023 12:16, Konrad Dybcio wrote: >>> SM6350 GPUCC uses the same clock names as the rest of the gang, except >>> without a _src suffix. Account for that. >> >> Why not fixing the names instead (to use the same)? If the clocks are >> the same, why using different names for the inputs? To remind - these >> are not names of clocks in GCC, but names of clock inputs to the device. > Considering SM6350 is the only used of SM6350_GPUCC and it's not yet > in next and I don't think any other project using devicetree has > Adreno up on any platform, let alone this one, I suppose the ABI could > be broken and the driver could be made to expect the more common set > of names? Or I could transition it to index-based lookup? Comments, please? Konrad > > Konrad >> >>> >>> Fixes: 7b91b9d8cc6c ("dt-bindings: clock: add SM6350 QCOM Graphics clock bindings") >>> Signed-off-by: Konrad Dybcio >>> --- >>> .../devicetree/bindings/clock/qcom,gpucc.yaml | 29 +++++++++++++++++++--- >>> 1 file changed, 25 insertions(+), 4 deletions(-) >>> >>> diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml >>> index db53eb288995..d209060a619d 100644 >>> --- a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml >>> +++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml >>> @@ -43,10 +43,8 @@ properties: >>> - description: GPLL0 div branch source >>> >>> clock-names: >>> - items: >>> - - const: bi_tcxo >>> - - const: gcc_gpu_gpll0_clk_src >>> - - const: gcc_gpu_gpll0_div_clk_src >>> + minItems: 3 >> >> Drop minItems, not needed as it is implied by maxItems. >> >>> + maxItems: 3 >>> >>> '#clock-cells': >>> const: 1 >>> @@ -71,6 +69,29 @@ required: >>> >>> additionalProperties: false >>> >>> >> >> Best regards, >> Krzysztof >>