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[83.9.1.37]) by smtp.gmail.com with ESMTPSA id b6-20020a056512218600b004b5480edf67sm393504lft.36.2023.04.06.12.55.41 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 06 Apr 2023 12:55:43 -0700 (PDT) Message-ID: <3ce9b5ec-8b02-537a-c663-c849e80cab66@linaro.org> Date: Thu, 6 Apr 2023 21:55:40 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.9.1 Subject: Re: [PATCH v2 1/2] dt-bindings: interrupt-controller: mpm: Pass MSG RAM slice through phandle Content-Language: en-US To: Krzysztof Kozlowski , Rob Herring Cc: Thomas Gleixner , Andy Gross , linux-kernel@vger.kernel.org, Shawn Guo , Marijn Suijten , Krzysztof Kozlowski , Bjorn Andersson , Marc Zyngier , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org References: <20230328-topic-msgram_mpm-v2-0-e24a48e57f0d@linaro.org> <20230328-topic-msgram_mpm-v2-1-e24a48e57f0d@linaro.org> <168069726278.2356075.14351594478003012447.robh@kernel.org> <20230405134727.GA2461305-robh@kernel.org> <1e6e2590-ac78-400b-35ce-321d5e52f385@linaro.org> <9df12111-ec84-c4f7-fbcb-bccaef91b048@linaro.org> From: Konrad Dybcio In-Reply-To: <9df12111-ec84-c4f7-fbcb-bccaef91b048@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-2.4 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 6.04.2023 19:45, Krzysztof Kozlowski wrote: > On 05/04/2023 15:49, Konrad Dybcio wrote: >> >> >> On 5.04.2023 15:47, Rob Herring wrote: >>> On Wed, Apr 05, 2023 at 07:22:40AM -0500, Rob Herring wrote: >>>> >>>> On Wed, 05 Apr 2023 12:48:34 +0200, Konrad Dybcio wrote: >>>>> Due to the wild nature of the Qualcomm RPM Message RAM, we can't really >>>>> use 'reg' to point to the MPM's slice of Message RAM without cutting into >>>>> an already-defined RPM MSG RAM node used for GLINK and SMEM. >>>>> >>>>> Document passing the register space as a slice of SRAM through the >>>>> qcom,rpm-msg-ram property. This also makes 'reg' deprecated. >>>>> >>>>> Signed-off-by: Konrad Dybcio >>>>> --- >>>>> .../devicetree/bindings/interrupt-controller/qcom,mpm.yaml | 12 +++++++++--- >>>>> 1 file changed, 9 insertions(+), 3 deletions(-) >>>>> >>>> >>>> My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' >>>> on your patch (DT_CHECKER_FLAGS is new in v5.13): >>>> >>>> yamllint warnings/errors: >>>> >>>> dtschema/dtc warnings/errors: >>>> Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.example.dts:22.35-38.11: Warning (node_name_vs_property_name): /example-0/interrupt-controller: node name and property name conflict >>> >>> Looks like this is colliding with the example template which has to >>> craft an interrupt provider for 'interrupts' properties. Either adding a >>> parent node or using interrupts-extended instead should work-around it. >> Check the devicetree-org issue linked in the cover letter, please! >> >> I suppose wrapping it in a parent node could work as a temporary >> measure, but since it belongs outside /soc, I'd have to make up >> a bogus simple-bus, I think. > > I don't think your issue in dtschema is accurate. As Rob suggested, you > need wrapping node. I don't really know what kind.. I can add something like: rpm { compatible = "qcom,rpm", "simple-mfd"; mpm: interrupt-controller { ... }; And then only introduce a very simple YAML for "qcom,rpm" describing what it is and documenting the compatible. Or I can push it under rpm-requests{}. Konrad > > Best regards, > Krzysztof >