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Mon, 10 Apr 2023 09:33:09 -0700 (PDT) MIME-Version: 1.0 References: <20230320093259.845178-1-korneld@chromium.org> In-Reply-To: From: =?UTF-8?Q?Kornel_Dul=C4=99ba?= Date: Mon, 10 Apr 2023 18:32:58 +0200 Message-ID: Subject: Re: [PATCH] pinctrl: amd: Disable and mask interrupts on resume To: "Gong, Richard" Cc: Mario Limonciello , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, regressions@leemhuis.info, Basavaraj Natikar , Shyam Sundar S K , Linus Walleij , upstream@semihalf.com, rad@semihalf.com, mattedavis@google.com, gregkh@linuxfoundation.org, stable@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Apr 10, 2023 at 6:17=E2=80=AFPM Kornel Dul=C4=99ba wrote: > > On Mon, Apr 10, 2023 at 5:29=E2=80=AFPM Gong, Richard wrote: > > > > On 4/10/2023 12:03 AM, Mario Limonciello wrote: > > > On 3/20/23 04:32, Kornel Dul=C4=99ba wrote: > > > > > >> This fixes a similar problem to the one observed in: > > >> commit 4e5a04be88fe ("pinctrl: amd: disable and mask interrupts on > > >> probe"). > > >> > > >> On some systems, during suspend/resume cycle firmware leaves > > >> an interrupt enabled on a pin that is not used by the kernel. > > >> This confuses the AMD pinctrl driver and causes spurious interrupts. > > >> > > >> The driver already has logic to detect if a pin is used by the kerne= l. > > >> Leverage it to re-initialize interrupt fields of a pin only if it's = not > > >> used by us. > > >> > > >> Signed-off-by: Kornel Dul=C4=99ba > > >> --- > > >> drivers/pinctrl/pinctrl-amd.c | 36 +++++++++++++++++++------------= ---- > > >> 1 file changed, 20 insertions(+), 16 deletions(-) > > >> > > >> diff --git a/drivers/pinctrl/pinctrl-amd.c > > >> b/drivers/pinctrl/pinctrl-amd.c > > >> index 9236a132c7ba..609821b756c2 100644 > > >> --- a/drivers/pinctrl/pinctrl-amd.c > > >> +++ b/drivers/pinctrl/pinctrl-amd.c > > >> @@ -872,32 +872,34 @@ static const struct pinconf_ops amd_pinconf_op= s > > >> =3D { > > >> .pin_config_group_set =3D amd_pinconf_group_set, > > >> }; > > >> -static void amd_gpio_irq_init(struct amd_gpio *gpio_dev) > > >> +static void amd_gpio_irq_init_pin(struct amd_gpio *gpio_dev, int pi= n) > > >> { > > >> - struct pinctrl_desc *desc =3D gpio_dev->pctrl->desc; > > >> + const struct pin_desc *pd; > > >> unsigned long flags; > > >> u32 pin_reg, mask; > > >> - int i; > > >> mask =3D BIT(WAKE_CNTRL_OFF_S0I3) | BIT(WAKE_CNTRL_OFF_S3) | > > >> BIT(INTERRUPT_MASK_OFF) | BIT(INTERRUPT_ENABLE_OFF) | > > >> BIT(WAKE_CNTRL_OFF_S4); > > >> - for (i =3D 0; i < desc->npins; i++) { > > >> - int pin =3D desc->pins[i].number; > > >> - const struct pin_desc *pd =3D pin_desc_get(gpio_dev->pctrl,= pin); > > >> - > > >> - if (!pd) > > >> - continue; > > >> + pd =3D pin_desc_get(gpio_dev->pctrl, pin); > > >> + if (!pd) > > >> + return; > > >> - raw_spin_lock_irqsave(&gpio_dev->lock, flags); > > >> + raw_spin_lock_irqsave(&gpio_dev->lock, flags); > > >> + pin_reg =3D readl(gpio_dev->base + pin * 4); > > >> + pin_reg &=3D ~mask; > > >> + writel(pin_reg, gpio_dev->base + pin * 4); > > >> + raw_spin_unlock_irqrestore(&gpio_dev->lock, flags); > > >> +} > > >> - pin_reg =3D readl(gpio_dev->base + i * 4); > > >> - pin_reg &=3D ~mask; > > >> - writel(pin_reg, gpio_dev->base + i * 4); > > >> +static void amd_gpio_irq_init(struct amd_gpio *gpio_dev) > > >> +{ > > >> + struct pinctrl_desc *desc =3D gpio_dev->pctrl->desc; > > >> + int i; > > >> - raw_spin_unlock_irqrestore(&gpio_dev->lock, flags); > > >> - } > > >> + for (i =3D 0; i < desc->npins; i++) > > >> + amd_gpio_irq_init_pin(gpio_dev, i); > > >> } > > >> #ifdef CONFIG_PM_SLEEP > > >> @@ -950,8 +952,10 @@ static int amd_gpio_resume(struct device *dev) > > >> for (i =3D 0; i < desc->npins; i++) { > > >> int pin =3D desc->pins[i].number; > > >> - if (!amd_gpio_should_save(gpio_dev, pin)) > > >> + if (!amd_gpio_should_save(gpio_dev, pin)) { > > >> + amd_gpio_irq_init_pin(gpio_dev, pin); > > >> continue; > > >> + } > > >> raw_spin_lock_irqsave(&gpio_dev->lock, flags); > > >> gpio_dev->saved_regs[i] |=3D readl(gpio_dev->base + pin * = 4) > > >> & PIN_IRQ_PENDING; > > > > > > Hello Kornel, > > > > > > I've found that this commit which was included in 6.3-rc5 is causing = a > > > regression waking up from lid on a Lenovo Z13. > > observed "unable to wake from power button" on AMD based Dell platform. > > Reverting "pinctrl: amd: Disable and mask interrupts on resume" on the > > top of 6.3-rc6 does fix the issue. > > Whoops, sorry for the breakage. > Could you please share the output of "/sys/kernel/debug/gpio" before > and after the first suspend/resume cycle. Oh and also I'd need to compare the output from this with and without this patch reverted. > I've looked at the patch again and found a rather silly mistake. > Please try the following. > Note that I don't have access to hardware with this controller at the > moment, so I've only compile tested it. > > diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.= c > index 609821b756c2..7e7770152ca8 100644 > --- a/drivers/pinctrl/pinctrl-amd.c > +++ b/drivers/pinctrl/pinctrl-amd.c > @@ -899,7 +899,7 @@ static void amd_gpio_irq_init(struct amd_gpio *gpio_d= ev) > int i; > > for (i =3D 0; i < desc->npins; i++) > - amd_gpio_irq_init_pin(gpio_dev, i); > + amd_gpio_irq_init_pin(gpio_dev, desc->pins[i].number); > } > > > > > > > > Reverting it on top of 6.3-rc6 resolves the problem. > > > > > > I've collected what I can into this bug report: > > > > > > https://bugzilla.kernel.org/show_bug.cgi?id=3D217315 > > > > > > Linus Walleij, > > > > > > It looks like this was CC to stable. If we can't get a quick solutio= n > > > we might want to pull this from stable. > > > > this commit landed into 6.1.23 as well > > > > d9c63daa576b2 pinctrl: amd: Disable and mask interrupts on res= ume > > > > > > > > Thanks, > > > > > > > > Regards, > > > > Richard > >