Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
Date:   Tue, 11 Apr 2023 10:13:24 +0100
From:   Conor Dooley <conor.dooley@microchip.com>
To:     Mason Huo <mason.huo@starfivetech.com>
CC:     "Rafael J. Wysocki" <rafael@kernel.org>,
        Viresh Kumar <viresh.kumar@linaro.org>,
        Emil Renner Berthing <kernel@esmil.dk>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Conor Dooley <conor@kernel.org>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Albert Ou <aou@eecs.berkeley.edu>,
        Shengyu Qu <wiagn233@outlook.com>, <linux-pm@vger.kernel.org>,
        <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
        <linux-riscv@lists.infradead.org>
Subject: Re: [PATCH v1 1/3] riscv: dts: starfive: Enable axp15060 pmic for
 cpufreq
Message-ID: <20230411-chimp-unvarying-142394732ff5@wendy>
References: <20230411083257.16155-1-mason.huo@starfivetech.com>
 <20230411083257.16155-2-mason.huo@starfivetech.com>
MIME-Version: 1.0
Content-Type: multipart/signed; micalg=pgp-sha256;
        protocol="application/pgp-signature"; boundary="4LuYI8HlWhg/F6SG"
Content-Disposition: inline
In-Reply-To: <20230411083257.16155-2-mason.huo@starfivetech.com>
Precedence: bulk

--4LuYI8HlWhg/F6SG
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
Content-Transfer-Encoding: quoted-printable

On Tue, Apr 11, 2023 at 04:32:55PM +0800, Mason Huo wrote:
> The VisionFive 2 board has an embedded pmic axp15060,
> which supports the cpu DVFS through the dcdc2 regulator.
> This patch enables axp15060 pmic and configs the dcdc2.
>=20
> Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
> ---
>  .../starfive/jh7110-starfive-visionfive-2.dtsi    | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
>=20
> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dt=
si b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> index 2a6d81609284..df582bddae4b 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> @@ -114,6 +114,21 @@ &i2c5 {
>  	pinctrl-names =3D "default";
>  	pinctrl-0 =3D <&i2c5_pins>;
>  	status =3D "okay";
> +
> +	pmic: axp15060_reg@36 {

No underscores in node names please & "pmic" is the generic node name
for pmics.

Cheers,
Conor.

> +		compatible =3D "x-powers,axp15060";
> +		reg =3D <0x36>;
> +
> +		regulators {
> +			reg_dcdc2: dcdc2 {
> +				regulator-boot-on;
> +				regulator-always-on;
> +				regulator-min-microvolt =3D <500000>;
> +				regulator-max-microvolt =3D <1540000>;
> +				regulator-name =3D "vdd-cpu";
> +			};
> +		};
> +	};
>  };
> =20
>  &i2c6 {
> --=20
> 2.39.2
>=20

--4LuYI8HlWhg/F6SG
Content-Type: application/pgp-signature; name="signature.asc"

-----BEGIN PGP SIGNATURE-----

iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZDUktAAKCRB4tDGHoIJi
0ptHAQCDKGI3XyRxsVsoA9ciou5bbpoELojUFMtGujWP5aLzMgD/fvEH3XsXgs4X
IK9tDzpwxqp7DnaE/yiMSrJHFzcauw0=
=QUPe
-----END PGP SIGNATURE-----

--4LuYI8HlWhg/F6SG--