Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
From:   Lorenzo Pieralisi <lpieralisi@kernel.org>
To:     andersson@kernel.org, kw@linux.com,
        krzysztof.kozlowski+dt@linaro.org, robh@kernel.org,
        Manivannan Sadhasivam <mani@kernel.org>
Cc:     Lorenzo Pieralisi <lpieralisi@kernel.org>,
        konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org,
        devicetree@vger.kernel.org, linux-pci@vger.kernel.org,
        linux-kernel@vger.kernel.org, quic_srichara@quicinc.com
Subject: Re: (subset) [PATCH v5 00/19] Qcom PCIe cleanups and improvements
Date:   Tue, 11 Apr 2023 11:34:23 +0200
Message-Id: <168120564704.14983.16177525029938219266.b4-ty@kernel.org>
In-Reply-To: <20230316081117.14288-1-manivannan.sadhasivam@linaro.org>
References: <20230316081117.14288-1-manivannan.sadhasivam@linaro.org>
MIME-Version: 1.0
Content-Type: text/plain; charset="utf-8"
Content-Transfer-Encoding: 8bit
Precedence: bulk

On Thu, 16 Mar 2023 13:40:58 +0530, Manivannan Sadhasivam wrote:
> This series brings in several code cleanups and improvements to the
> Qualcomm PCIe controller drivers (RC and EP). The cleanup part mostly
> cleans up the bitfield definitions and transitions to bulk APIs for clocks,
> and resets. The improvement part adds the debugfs entries to track link
> transition counts in RC driver.
> 
> Testing
> -------
> 
> [...]

Applied to controller/qcom, thanks!

[01/19] PCI: qcom: Fix the incorrect register usage in v2.7.0 config
        https://git.kernel.org/pci/pci/c/2542e16c3925
[02/19] PCI: qcom: Remove PCIE20_ prefix from register definitions
        https://git.kernel.org/pci/pci/c/39171b33f652
[03/19] PCI: qcom: Sort and group registers and bitfield definitions
        https://git.kernel.org/pci/pci/c/769e49d87b15
[04/19] PCI: qcom: Use bitfield definitions for register fields
        https://git.kernel.org/pci/pci/c/57eddec8dc30
[05/19] PCI: qcom: Add missing macros for register fields
        https://git.kernel.org/pci/pci/c/17804668ca54
[06/19] PCI: qcom: Use lower case for hex
        https://git.kernel.org/pci/pci/c/94ebd232dbc8
[07/19] PCI: qcom: Use bulk reset APIs for handling resets for IP rev 2.1.0
        https://git.kernel.org/pci/pci/c/383215dd2fd7
[08/19] PCI: qcom: Use bulk clock APIs for handling clocks for IP rev 1.0.0
        https://git.kernel.org/pci/pci/c/5d4ffe5ec5e9
[09/19] PCI: qcom: Use bulk clock APIs for handling clocks for IP rev 2.3.2
        https://git.kernel.org/pci/pci/c/5329bcc4a1e7
[10/19] PCI: qcom: Use bulk clock APIs for handling clocks for IP rev 2.3.3
        https://git.kernel.org/pci/pci/c/b699ed9b03de
[11/19] PCI: qcom: Use bulk reset APIs for handling resets for IP rev 2.3.3
        https://git.kernel.org/pci/pci/c/157fecca3558
[12/19] PCI: qcom: Use bulk reset APIs for handling resets for IP rev 2.4.0
        https://git.kernel.org/pci/pci/c/fb0eacb2972e
[13/19] PCI: qcom: Use macros for defining total no. of clocks & supplies
        https://git.kernel.org/pci/pci/c/656a08820e7b
[14/19] PCI: qcom: Rename qcom_pcie_config_sid_sm8250() to reflect IP version
        https://git.kernel.org/pci/pci/c/1f70939871b2
[15/19] dt-bindings: PCI: qcom: Add "mhi" register region to supported SoCs
        https://git.kernel.org/pci/pci/c/0f80edf8447d
[19/19] PCI: qcom: Expose link transition counts via debugfs
        https://git.kernel.org/pci/pci/c/05f464640962

Thanks,
Lorenzo