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Message-ID: <ff5691b4-df1a-57a8-6e96-f997bbe340f4@linaro.org>
Date:   Tue, 11 Apr 2023 13:57:58 +0200
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Subject: Re: [PATCH v3 3/3] arm64: dts: qcom: qrb4210-rb2: Increase load on
 l22 and l24 for uSD and eMMC
Content-Language: en-US
To:     Bhupesh Sharma <bhupesh.sharma@linaro.org>,
        linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org
Cc:     agross@kernel.org, andersson@kernel.org,
        linux-kernel@vger.kernel.org, bhupesh.linux@gmail.com,
        robh+dt@kernel.org, krzysztof.kozlowski@linaro.org
References: <20230411072840.2751813-1-bhupesh.sharma@linaro.org>
 <20230411072840.2751813-4-bhupesh.sharma@linaro.org>
From:   Konrad Dybcio <konrad.dybcio@linaro.org>
In-Reply-To: <20230411072840.2751813-4-bhupesh.sharma@linaro.org>
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On 11.04.2023 09:28, Bhupesh Sharma wrote:
> Increase the l22 and l24 load used for uSD and eMMC VMMC.
> These need to be increased in order to prevent any voltage drop
> issues due to limited current happening during specific operations
> (e.g. write).
> 
> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> ---
You could have simply squashed this into the patch where
you enabled the controllers, so that that commit works
reliably for e.g. bisect

Konrad
>  arch/arm64/boot/dts/qcom/qrb4210-rb2.dts | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts
> index c9c6e3787462..dc80f0bca767 100644
> --- a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts
> +++ b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts
> @@ -171,6 +171,8 @@ vreg_l21a_2p704: l21 {
>  		vreg_l22a_2p96: l22 {
>  			regulator-min-microvolt = <2952000>;
>  			regulator-max-microvolt = <3304000>;
> +			regulator-system-load = <100000>;
> +			regulator-allow-set-load;
>  		};
>  
>  		vreg_l23a_3p3: l23 {
> @@ -181,6 +183,8 @@ vreg_l23a_3p3: l23 {
>  		vreg_l24a_2p96: l24 {
>  			regulator-min-microvolt = <2704000>;
>  			regulator-max-microvolt = <3600000>;
> +			regulator-system-load = <100000>;
> +			regulator-allow-set-load;
>  		};
>  	};
>  };