Received: by 2002:a05:6358:11c7:b0:104:8066:f915 with SMTP id i7csp5593931rwl; Tue, 11 Apr 2023 07:33:17 -0700 (PDT) X-Google-Smtp-Source: AKy350azTUKnGzyN1Zl/+vwZY4tvj9ezbu7knSPzAi280qPKtOgULlActxBUnPLLBr+wYy1Rv2l8 X-Received: by 2002:aa7:db93:0:b0:504:66e3:c21a with SMTP id u19-20020aa7db93000000b0050466e3c21amr12076332edt.24.1681223597125; Tue, 11 Apr 2023 07:33:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1681223597; cv=none; d=google.com; s=arc-20160816; b=0NTItGzaxA04zimuBjGC5kvgGh2O7CiUO4k1K8YHQV0iYZ/CAtzBybSVymx4uMkUte qypY7pYMc5Y1GrnrxUQ04L3Mn6OL9IHLtzRzOejQfl0d7Lt9qoKVz7fm6R9XF0B5g946 mjrKQQFMWf2BVtq0iovX3y7BthIYFoZIUhgU7doGYkL/oZiXOGrvvVhdRk8zYCicXFv7 IPiWLB0YBPR8TYuPp/DYcc+bx7hYvW4TKZEya1UocMPyvzl5Dgkv/KbRSzJ1eqI39t5t +JGucF22obNXJVvQRHQHDOYXd+g8KbA4FrpdiH5q/NnTcDRfk9Ehqi7iABchQyHO7HCZ X0ew== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:user-agent:content-disposition:mime-version :message-id:subject:cc:to:from:date:dkim-signature; bh=1vLiQUIy46/kdd0rAp/PDT1r0pa4361FJ8Qss2urHD4=; b=BTq6O+sfjT1DzZHO3gSeEadnZzv4qOqeGb55honZmcWDgwiY6erOcFWnR4Zf2kY4+F GW3fP7J5CSwXiabw9kP88lmxcgbtmjeWlw8G+lB/S+9w+K5GbIvgzPLwJjqcBd7ng5LA s1nW6q+uirUs44kA9zwY4RtNO4p6jGi2duIhVudPPj/YNY7Hkp9iV5JCREN3yDITl2Hg G/+iH4QL3okuFDIKhiuUJUw7GQCebylcwUHQMG86X+soQh/EaJdgLkhUvouD/gFyrBLO 9cYTKR6pZ3vCjLPmMYGEGIbN8NTEa876pRgXzooPhgN16m6FAe21/tmu8fsqhYnKSrLH IyRw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=EIwfJvto; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id f9-20020a05640214c900b005048c3d97d7si7727510edx.249.2023.04.11.07.32.51; Tue, 11 Apr 2023 07:33:17 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=EIwfJvto; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230319AbjDKO0b (ORCPT + 99 others); Tue, 11 Apr 2023 10:26:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35920 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230114AbjDKO0V (ORCPT ); Tue, 11 Apr 2023 10:26:21 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5F69D55BD for ; Tue, 11 Apr 2023 07:26:07 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id F24A561C03 for ; Tue, 11 Apr 2023 14:26:06 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2C303C4339B; Tue, 11 Apr 2023 14:26:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1681223166; bh=YuM2O01SoB7qsK2kdvinWtyQVTT9oJLIx/qQD2GkO1M=; h=Date:From:To:Cc:Subject:From; b=EIwfJvtoPlvUVU0TLboD/60OZsbhgjSA5OeUZdIWdJ7W64LvJvsOE6rDk/ZDmG24y YaR3j8h+CS/5VK4UhNZhXx9TXWS1MC14Auh5DdVb6LYSHNKiwxVjLNkjPNfgbdwYk8 6eo5/1zoPhTf6R8fpXNEzI4PaP0HCG7iVsT489khzUZ7U6oafTo73Ns3XSECpqngtu wFlyEO5q7WPGT01Qk19UNmVgoPoj80fvTDQKuCtVE4YHciql/O3TsHSJcHNy8sMF1Q XmhafdxeXQlzX+u5lRa9nXMU1yBeySYbFc/2uojBkUkZS387jzDoSI1WDBdveNDh8j /RWz3kolNlcJw== Date: Tue, 11 Apr 2023 15:26:01 +0100 From: Will Deacon To: joro@8bytes.org Cc: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, robin.murphy@arm.com, kernel-team@android.com Subject: [GIT PULL] iommu/arm-smmu: Updates for 6.4 Message-ID: <20230411142600.GA22971@willie-the-truck> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.10.1 (2018-07-13) X-Spam-Status: No, score=-2.5 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Joerg, Please pull these Arm SMMU updates for 6.4. It's mostly the usual minor DT binding updates, but there are also a couple of functional changes relating to quirk detection and queue overflow. Summary in the tag. Cheers, Will --->8 The following changes since commit e8d018dd0257f744ca50a729e3d042cf2ec9da65: Linux 6.3-rc3 (2023-03-19 13:27:55 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/will/linux.git tags/arm-smmu-updates for you to fetch changes up to ca08b2a65b5cf2814e4db40bfa5a240600e88cee: Merge branch 'for-joerg/arm-smmu/bindings' into for-joerg/arm-smmu/updates (2023-04-11 14:05:06 +0100) ---------------------------------------------------------------- Arm SMMU updates for 6.4 - Device-tree binding updates: * Allow Qualcomm GPU SMMUs to accept relevant clock properties * Document Qualcomm 8550 SoC as implementing an MMU-500 * Favour new "qcom,smmu-500" binding for Adreno SMMUs - Fix S2CR quirk detection on non-architectural Qualcomm SMMU implementations - Acknowledge SMMUv3 PRI queue overflow when consuming events - Document (in a comment) why ATS is disabled for bypass streams ---------------------------------------------------------------- Abel Vesa (1): dt-bindings: arm-smmu: Add compatible for SM8550 SoC Jean-Philippe Brucker (1): iommu/arm-smmu-v3: Explain why ATS stays disabled with bypass Konrad Dybcio (3): dt-bindings: arm-smmu: Use qcom,smmu compatible for MMU500 adreno SMMUs dt-bindings: arm-smmu: Add SM8350 Adreno SMMU dt-bindings: arm-smmu: Document SM61[12]5 GPU SMMU Manivannan Sadhasivam (1): iommu/arm-smmu-qcom: Limit the SMR groups to 128 Tomas Krcka (1): iommu/arm-smmu-v3: Acknowledge pri/event queue overflow if any Will Deacon (1): Merge branch 'for-joerg/arm-smmu/bindings' into for-joerg/arm-smmu/updates .../devicetree/bindings/iommu/arm,smmu.yaml | 45 ++++++++++++++++++++-- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 26 ++++++++++--- drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 16 +++++++- 3 files changed, 77 insertions(+), 10 deletions(-)