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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id c17-20020a056830001100b006a2e9ccb42esm6413802otp.19.2023.04.12.06.15.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Apr 2023 06:15:22 -0700 (PDT) Received: (nullmailer pid 1917201 invoked by uid 1000); Wed, 12 Apr 2023 13:15:21 -0000 Date: Wed, 12 Apr 2023 08:15:21 -0500 From: Rob Herring To: Cristian Marussi Cc: Sudeep Holla , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, vincent.guittot@linaro.org, souvik.chakravarty@arm.com, nicola.mazzucato@arm.com, Tushar.Khandelwal@arm.com, viresh.kumar@linaro.org, jassisinghbrar@gmail.com, Krzysztof Kozlowski , devicetree@vger.kernel.org Subject: Re: [PATCH 1/2] dt-bindings: mailbox : arm,mhuv2: Allow for more RX interrupts Message-ID: <20230412131521.GA1830888-robh@kernel.org> References: <20230329153936.394911-1-cristian.marussi@arm.com> <20230329153936.394911-2-cristian.marussi@arm.com> <20230329174431.yga3c233sazimane@bogus> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00, FREEMAIL_ENVFROM_END_DIGIT,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Mar 30, 2023 at 09:29:23AM +0100, Cristian Marussi wrote: > On Wed, Mar 29, 2023 at 06:44:31PM +0100, Sudeep Holla wrote: > > On Wed, Mar 29, 2023 at 04:39:35PM +0100, Cristian Marussi wrote: > > > The ARM MHUv2 Receiver block can indeed support more interrupts, up to the > > > maximum number of available channels, but anyway no more than the maximum > > > number of supported interrupt for an AMBA device. > > > > > > Signed-off-by: Cristian Marussi > > > --- > > > Cc: Rob Herring > > > Cc: Krzysztof Kozlowski > > > Cc: devicetree@vger.kernel.org > > > > > > .../devicetree/bindings/mailbox/arm,mhuv2.yaml | 13 +++++++++---- > > > 1 file changed, 9 insertions(+), 4 deletions(-) > > > > > > diff --git a/Documentation/devicetree/bindings/mailbox/arm,mhuv2.yaml b/Documentation/devicetree/bindings/mailbox/arm,mhuv2.yaml > > > index a4f1fe63659a..5a57f4e2a623 100644 > > > --- a/Documentation/devicetree/bindings/mailbox/arm,mhuv2.yaml > > > +++ b/Documentation/devicetree/bindings/mailbox/arm,mhuv2.yaml > > > @@ -69,10 +69,15 @@ properties: > > > > > > interrupts: > > > description: | > > > - The MHUv2 controller always implements an interrupt in the "receiver" > > > - mode, while the interrupt in the "sender" mode was not available in the > > > - version MHUv2.0, but the later versions do have it. > > > - maxItems: 1 > > > + The MHUv2 controller always implements at least an interrupt in the > > > + "receiver" mode, while the interrupt in the "sender" mode was not > > > + available in the version MHUv2.0, but the later versions do have it. > > > + In "receiver" mode, beside a single combined interrupt, there could be > > > + multiple interrupts, up to the number of implemented channels but anyway > > > + no more than the maximum number of interrupts potentially supported by > > > + AMBA. > > > + minItems: 1 > > > + maxItems: 9 > > > > Hi, > > > I am not sure 9 is the correct value here. IIUC it is just what Linux defines > > as AMBA_NR_IRQS. Looking at the history it was bumped from 2 to 9 for use > > by PL330 DMA driver. I couldn't find anything to relate this 9 in any > > AMBA or other related specification. > > > > Yes, I could not find either where the 9 comes from, but it is what > currently each amba device is limited to, at the software level, in terms of > interrupts that can be detected. IIRC, the PL330 can have an interrupt per context with up to 8 contexts and then 1 global interrupt. > > > Ideally I would say we don't know what the max here. We just have a platform > > implementing 2 interrupts now. Do we for with 2 for now and change it if some > > new users require more in the future ? > > > > By the spec seems to me that the maximum number of interrupts are equal to > the maximum possible channels (124), or one combined interrupt. > > But these in turn, as said, are capped by the AMBA_NR_IRQS and I have > only seen one system using 2. (for which I need this series to work) > > > I will leave that to the DT maintainers but 9 is simply random based on Linux > > code so I would rather choose some other random number with a better reasoning > > than 9 as AMBA code in the kernel is limiting it to 9. > > > > Agreed. Aiming to describe any possible hw in the DT, I would say 124 at > this point. (even though implausible not to use the combined interrupt > at that point...) Then use 124, but please describe how you get that in the description. Rob