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From:   Udit Kumar <u-kumar1@ti.com>
To:     <linux-arm-kernel@lists.infradead.org>,
        <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
        <nm@ti.com>, <vigneshr@ti.com>, <kristo@kernel.org>,
        <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
        <a-govindraju@ti.com>, <kishon@ti.com>
CC:     <n-dasan@ti.com>, Udit Kumar <u-kumar1@ti.com>
Subject: [PATCH] arm64: dts: ti: k3-j721s2-main: fix msmc node
Date:   Wed, 12 Apr 2023 23:06:09 +0530
Message-ID: <20230412173609.1307837-1-u-kumar1@ti.com>
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On J721S2 SOC, l3cache-sram size is configured as zero by
system firmware.
Also top 64K of msmc_ram (0x703F_0000 to 0x703F_FFFF) is used by system
firmware tifs-sram.

This patch removes l3cache-sram node and update range for tifs-sram.

Fixes: b8545f9d3a54 ("arm64: dts: ti: Add initial support for J721S2 SoC")

Signed-off-by: Udit Kumar <u-kumar1@ti.com>
---
 arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
index 2dd7865f7654..cbc784f915a9 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
@@ -17,13 +17,10 @@ atf-sram@0 {
 			reg = <0x0 0x20000>;
 		};
 
-		tifs-sram@1f0000 {
-			reg = <0x1f0000 0x10000>;
+		tifs-sram@3f0000 {
+			reg = <0x3f0000 0x10000>;
 		};
 
-		l3cache-sram@200000 {
-			reg = <0x200000 0x200000>;
-		};
 	};
 
 	gic500: interrupt-controller@1800000 {
-- 
2.34.1